mirror of
https://github.com/stnolting/neorv32.git
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[bootloader] rework main
This commit is contained in:
stnolting
parent
da53cea8fc
commit
6ac6695860
3 changed files with 547 additions and 1075 deletions
File diff suppressed because it is too large
Load diff
504
sw/bootloader/main.c
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504
sw/bootloader/main.c
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// ================================================================================ //
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// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
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// Copyright (c) NEORV32 contributors. //
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// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
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// Licensed under the BSD-3-Clause license, see LICENSE for details. //
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// SPDX-License-Identifier: BSD-3-Clause //
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// ================================================================================ //
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/**
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* @file main.c
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* @brief NEORV32 bootloader.
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*/
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// libraries
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#include <stdint.h>
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#include <neorv32.h>
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#include "config.h"
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#include "main.h"
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#include "spi_flash.h"
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#include "twi_flash.h"
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#include "uart.h"
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// global variables
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uint32_t exe_available = 0; // size of the loaded executable; 0 if no executable available
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// function prototypes
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void __attribute__((interrupt("machine"),aligned(4))) bootloader_trap_handler(void);
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void print_help(void);
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void start_app(void);
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int load_exe(int src);
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void save_exe(int dst);
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int get_exe_word(int src, uint32_t addr, uint32_t *rdata);
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void set_boot_addr(void);
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/**********************************************************************//**
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* Bootloader main.
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**************************************************************************/
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int main(void) {
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// ------------------------------------------------
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// Hardware setup
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// ------------------------------------------------
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// configure trap handler (bare-metal, no neorv32 rte available)
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neorv32_cpu_csr_write(CSR_MTVEC, (uint32_t)(&bootloader_trap_handler));
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// setup SPI, clock mode 0
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#if (SPI_EN != 0)
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if (neorv32_spi_available()) {
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neorv32_spi_setup(SPI_FLASH_CLK_PRSC, 0, 0, 0, 0);
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}
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#endif
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// activate status GPIO LED, clear all others
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#if (STATUS_LED_EN != 0)
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if (neorv32_gpio_available()) {
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neorv32_gpio_port_set(1 << STATUS_LED_PIN);
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}
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#endif
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// setup UART0
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#if (UART_EN != 0)
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neorv32_uart0_setup(UART_BAUD, 0);
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#endif
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#if (UART_EN != 0) && (UART_HW_HANDSHAKE_EN != 0)
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neorv32_uart0_rtscts_enable();
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#endif
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// setup TWI
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#if (TWI_EN != 0)
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neorv32_twi_setup(TWI_CLK_PRSC, TWI_CLK_DIV, 0);
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#endif
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// Configure CLINT timer interrupt
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if (neorv32_clint_available()) {
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NEORV32_CLINT->MTIME.uint32[0] = 0;
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NEORV32_CLINT->MTIME.uint32[0] = 0;
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NEORV32_CLINT->MTIMECMP[0].uint32[0] = NEORV32_SYSINFO->CLK/4;
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NEORV32_CLINT->MTIMECMP[0].uint32[1] = 0;
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neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE); // activate timer IRQ source
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neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE); // enable machine-mode interrupts
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}
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// ------------------------------------------------
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// Splash screen
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// ------------------------------------------------
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uart_puts("\n\nNEORV32 Bootloader\n\n"
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"BLDV: "
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__DATE__
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"\nHWV: ");
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uart_puth(neorv32_cpu_csr_read(CSR_MIMPID));
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uart_puts("\nCLK: ");
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uart_puth(NEORV32_SYSINFO->CLK);
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uart_puts("\nMISA: ");
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uart_puth(neorv32_cpu_csr_read(CSR_MISA));
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uart_puts("\nXISA: ");
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uart_puth(neorv32_cpu_csr_read(CSR_MXISA));
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uart_puts("\nSOC: ");
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uart_puth(NEORV32_SYSINFO->SOC);
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uart_puts("\nIMEM: ");
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uart_puth((uint32_t)(1 << NEORV32_SYSINFO->MISC[SYSINFO_MISC_IMEM]) & 0xFFFFFFFCU);
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uart_puts("\nDMEM: ");
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uart_puth((uint32_t)(1 << NEORV32_SYSINFO->MISC[SYSINFO_MISC_DMEM]) & 0xFFFFFFFCU);
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uart_puts("\n\n");
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// ------------------------------------------------
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// Auto boot sequence
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// ------------------------------------------------
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#if (AUTO_BOOT_EN != 0)
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uart_puts("Autoboot in "xstr(AUTO_BOOT_TIMEOUT)"s. Press any key to abort.\n");
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if (neorv32_clint_available()) {
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uint64_t timeout_time = neorv32_clint_time_get() + (uint64_t)(AUTO_BOOT_TIMEOUT * NEORV32_SYSINFO->CLK);
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while (1) {
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// wait for user input via UART0
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if (neorv32_uart0_available()) {
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if (neorv32_uart0_char_received()) {
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neorv32_uart0_char_received_get(); // discard received char
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uart_puts("Aborted.\n\n");
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goto skip_auto_boot;
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}
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}
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// timeout? start auto-boot sequence
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if (neorv32_clint_time_get() >= timeout_time) {
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break;
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}
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}
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}
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// try booting from SPI flash
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#if (SPI_EN != 0)
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if (load_exe(EXE_STREAM_SPI) == 0) { start_app(); }
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#endif
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// try booting from TWI flash
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#if (TWI_EN != 0)
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if (load_exe(EXE_STREAM_TWI) == 0) { start_app(); }
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#endif
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skip_auto_boot:
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#endif
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// ------------------------------------------------
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// User console
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// ------------------------------------------------
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#if (UART_EN != 0)
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print_help();
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char cmd;
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while (1) {
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// prompt
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uart_puts("CMD:> ");
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cmd = uart_getc();
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uart_putc(cmd);
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uart_putc('\n');
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if (cmd == 'r') { // restart bootloader
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asm volatile ("li t0, %[input_i]; jr t0" : : [input_i] "i" (NEORV32_BOOTROM_BASE)); // jump to beginning of boot ROM
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__builtin_unreachable();
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}
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else if (cmd == 'h') { // help menu
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print_help();
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}
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else if (cmd == 'u') { // get executable via UART
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load_exe(EXE_STREAM_UART);
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}
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#if (SPI_EN != 0)
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else if (cmd == 's') { // copy memory to SPI flash
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save_exe(EXE_STREAM_SPI);
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}
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else if (cmd == 'l') { // copy executable from SPI flash
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load_exe(EXE_STREAM_SPI);
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}
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#endif
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#if (TWI_EN != 0)
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else if (cmd == 't') { // copy executable from TWI flash
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load_exe(EXE_STREAM_TWI);
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}
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#endif
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else if (cmd == 'e') { // start application program from memory
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// executable available?
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if (exe_available == 0) {
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uart_puts("No executable.\n");
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uart_puts("Boot anyway (y/n)?\n");
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if (uart_getc() == 'y') {
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start_app();
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}
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}
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else {
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start_app();
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}
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}
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else if (cmd == 'd') { // for debugging only
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asm volatile ("ebreak");
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}
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else { // unknown command
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uart_puts("Invalid CMD\n");
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}
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}
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#endif
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while(1);
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return -1; // bootloader should never return
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}
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/**********************************************************************//**
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* Print help menu.
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**************************************************************************/
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void print_help(void) {
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uart_puts(
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"Available CMDs:\n"
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"h: Help\n"
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"r: Restart\n"
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"u: Upload via UART\n"
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#if (SPI_EN != 0)
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"s: Store to SPI flash\n"
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"l: Load from SPI flash\n"
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#endif
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#if (TWI_EN != 0)
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"t: Load from TWI flash\n"
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#endif
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"e: Start executable\n"
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);
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}
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/**********************************************************************//**
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* Start application program.
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**************************************************************************/
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void start_app(void) {
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// deactivate global IRQs
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neorv32_cpu_csr_clr(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE);
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uint32_t app_base = (uint32_t)EXE_BASE_ADDR;
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uart_puts("Booting from ");
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uart_puth(app_base);
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uart_puts("...\n\n");
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// shut down heart beat LED
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#if (STATUS_LED_EN != 0)
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if (neorv32_gpio_available()) {
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neorv32_gpio_port_set(0);
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}
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#endif
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// wait for UART0 to finish transmitting
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while (neorv32_uart0_tx_busy());
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// start application
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asm volatile ("csrw mepc, %0; mret" : : "r" (app_base));
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__builtin_unreachable();
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while (1); // should never be reached
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}
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/**********************************************************************//**
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* Bare-metal Bootloader trap handler.
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* Used for the CLINT timer tick and to capture any other traps.
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**************************************************************************/
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void __attribute__((interrupt("machine"),aligned(4))) bootloader_trap_handler(void) {
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uint32_t mcause = neorv32_cpu_csr_read(CSR_MCAUSE);
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// machine timer interrupt
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if (mcause == TRAP_CODE_MTI) { // raw exception code for MTI
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#if (STATUS_LED_EN != 0)
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if (neorv32_gpio_available()) {
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neorv32_gpio_pin_toggle(STATUS_LED_PIN); // toggle status LED
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}
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#endif
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// set time for next IRQ
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if (neorv32_clint_available()) {
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neorv32_clint_mtimecmp_set(neorv32_clint_time_get() + (NEORV32_SYSINFO->CLK/4));
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}
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return;
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}
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// unexpected trap
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#if (UART_EN != 0)
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if (neorv32_uart0_available()) {
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uart_puts("\a\nERROR_EXCEPTION ");
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uart_puth(mcause);
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uart_putc(' ');
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uart_puth(neorv32_cpu_csr_read(CSR_MEPC));
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uart_putc(' ');
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uart_puth(neorv32_cpu_csr_read(CSR_MTINST));
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uart_putc(' ');
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uart_puth(neorv32_cpu_csr_read(CSR_MTVAL));
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uart_putc('\n');
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}
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#endif
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// deactivate IRQs
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neorv32_cpu_csr_clr(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE);
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// permanently light up status LED
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#if (STATUS_LED_EN != 0)
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if (neorv32_gpio_available()) {
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neorv32_gpio_port_set(1 << STATUS_LED_PIN);
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}
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#endif
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// endless sleep mode
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while(1) {
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asm volatile("wfi");
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}
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__builtin_unreachable();
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}
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/**********************************************************************//**
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* Get executable stream.
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*
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* @param src Source of executable stream data. See #EXE_STREAM_SOURCE_enum.
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* @return 0 if success, != 0 if error.
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**************************************************************************/
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int load_exe(int src) {
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int rc = 0;
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// no executable available yet
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exe_available = 0;
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// flash image base address
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uint32_t src_addr = (uint32_t)FLASH_BASE_ADDR;
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// get image from UART?
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#if (UART_EN != 0)
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if (src == EXE_STREAM_UART) {
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uart_puts("Awaiting neorv32_exe.bin... ");
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}
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#endif
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// get image from SPI flash?
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#if (SPI_EN != 0)
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if (src == EXE_STREAM_SPI) {
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uart_puts("Loading from SPI flash @");
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uart_puth(src_addr);
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uart_puts("... ");
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rc |= spi_flash_check();
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}
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#endif
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// get image from TWI flash?
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#if (TWI_EN)
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if (src == EXE_STREAM_TWI) {
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uart_puts("Loading from TWI flash ");
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uart_puth(TWI_DEVICE_ID);
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uart_puts(" @");
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uart_puth(src_addr);
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uart_puts("... ");
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}
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#endif
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// get image header
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uint32_t exe_sign, exe_size, exe_check;
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rc |= get_exe_word(src, src_addr + EXE_OFFSET_SIGNATURE, &exe_sign);
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rc |= get_exe_word(src, src_addr + EXE_OFFSET_SIZE, &exe_size);
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rc |= get_exe_word(src, src_addr + EXE_OFFSET_CHECKSUM, &exe_check);
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// checks
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if (rc) {
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uart_puts("ERROR_DEVICE\n");
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return 1;
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}
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if (exe_sign != EXE_SIGNATURE) {
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uart_puts("ERROR_SIGNATURE\n");
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return 1;
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}
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// transfer executable
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uint32_t *pnt = (uint32_t*)EXE_BASE_ADDR;
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uint32_t checksum = 0, tmp = 0, i = 0;
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src_addr = src_addr + EXE_OFFSET_DATA;
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while (i < (exe_size/4)) { // in words
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if (get_exe_word(src, src_addr, &tmp)) {
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rc |= 1;
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break;
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}
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checksum += tmp;
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pnt[i++] = tmp;
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src_addr += 4;
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}
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// checks
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if (rc) {
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uart_puts("ERROR_DEVICE\n");
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return 1;
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}
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if ((checksum + exe_check) != 0) {
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uart_puts("ERROR_CHECKSUM\n");
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return 1;
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}
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uart_puts("OK\n");
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exe_available = exe_size;
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// we might have caches so the executable might not yet have fully arrived in main memory yet
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asm volatile ("fence"); // flush data caches to main memory
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asm volatile ("fence.i"); // re-sync instruction fetch to updated main memory
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return 0;
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}
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/**********************************************************************//**
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* Copy memory content as executable to flash.
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*
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* @param dst Destination of executable. See #EXE_STREAM_SOURCE_enum.
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**************************************************************************/
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void save_exe(int dst) {
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// only SPI programming is supported yet
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if (dst != EXE_STREAM_SPI) {
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return;
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}
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// size of last uploaded executable
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uint32_t size = exe_available;
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if (size == 0) {
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uart_puts("No executable.\n");
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return;
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}
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// info prompt
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uart_puts("Write ");
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uart_puth(size);
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uart_puts(" bytes to SPI flash @");
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uart_puth((uint32_t)FLASH_BASE_ADDR);
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uart_puts(" (y/n)?\n");
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if (uart_getc() != 'y') {
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return;
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}
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uart_puts("Flashing... ");
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// SPI and flash ok?
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if (spi_flash_check()) {
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uart_puts("ERROR_DEVICE\n");
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return;
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}
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// clear memory before writing
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uint32_t num_sectors = (size / (FLASH_SECTOR_SIZE)) + 1; // clear at least 1 sector
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uint32_t sector_base_addr = (uint32_t)FLASH_BASE_ADDR ;
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while (num_sectors--) {
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spi_flash_erase_sector(sector_base_addr);
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sector_base_addr += FLASH_SECTOR_SIZE;
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}
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// store data from memory and update checksum
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uint32_t checksum = 0, i = 0;
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uint32_t *pnt = (uint32_t*)EXE_BASE_ADDR;
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uint32_t src_addr = (uint32_t)FLASH_BASE_ADDR + EXE_OFFSET_DATA;
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while (i < size) { // in chunks of 4 bytes
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uint32_t d = (uint32_t)*pnt++;
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checksum += d;
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spi_flash_write_word(src_addr, d);
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src_addr += 4;
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i += 4;
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}
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// write header
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spi_flash_write_word(FLASH_BASE_ADDR + EXE_OFFSET_SIGNATURE, EXE_SIGNATURE);
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spi_flash_write_word(FLASH_BASE_ADDR + EXE_OFFSET_SIZE, size);
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spi_flash_write_word(FLASH_BASE_ADDR + EXE_OFFSET_CHECKSUM, (~checksum)+1);
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uart_puts("OK\n");
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}
|
||||
|
||||
|
||||
/**********************************************************************//**
|
||||
* Get word from executable stream.
|
||||
*
|
||||
* @param src Source of executable stream data. See #EXE_STREAM_SOURCE_enum.
|
||||
* @param addr Address when accessing SPI flash or TWI Device.
|
||||
* @param[in,out] rdata Pointer for returned data (uint32_t).
|
||||
* @return 0 if success, != 0 if error.
|
||||
**************************************************************************/
|
||||
int get_exe_word(int src, uint32_t addr, uint32_t *rdata) {
|
||||
|
||||
if (src == EXE_STREAM_UART) {
|
||||
return uart_getw(rdata);
|
||||
}
|
||||
else if (src == EXE_STREAM_SPI) {
|
||||
return spi_flash_read_word(addr, rdata);
|
||||
}
|
||||
else if (src == EXE_STREAM_TWI) {
|
||||
return twi_flash_read_word(addr, rdata);
|
||||
}
|
||||
else {
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
43
sw/bootloader/main.h
Normal file
43
sw/bootloader/main.h
Normal file
|
|
@ -0,0 +1,43 @@
|
|||
// ================================================================================ //
|
||||
// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
|
||||
// Copyright (c) NEORV32 contributors. //
|
||||
// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
|
||||
// Licensed under the BSD-3-Clause license, see LICENSE for details. //
|
||||
// SPDX-License-Identifier: BSD-3-Clause //
|
||||
// ================================================================================ //
|
||||
|
||||
/**
|
||||
* @file main.h
|
||||
* @brief Helper macros and defines.
|
||||
*/
|
||||
|
||||
#ifndef MAIN_H
|
||||
#define MAIN_H
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
/**********************************************************************//**
|
||||
Executable stream source select
|
||||
**************************************************************************/
|
||||
#define EXE_STREAM_UART 0 // Get executable via UART
|
||||
#define EXE_STREAM_SPI 1 // Get executable from SPI flash
|
||||
#define EXE_STREAM_TWI 2 // Get executable from TWI device
|
||||
|
||||
|
||||
/**********************************************************************//**
|
||||
* NEORV32 executable
|
||||
**************************************************************************/
|
||||
#define EXE_OFFSET_SIGNATURE (0) // Offset in bytes from start to signature (32-bit)
|
||||
#define EXE_OFFSET_SIZE (4) // Offset in bytes from start to size (32-bit)
|
||||
#define EXE_OFFSET_CHECKSUM (8) // Offset in bytes from start to checksum (32-bit)
|
||||
#define EXE_OFFSET_DATA (12) // Offset in bytes from start to data (32-bit)
|
||||
#define EXE_SIGNATURE 0x4788CAFEU // valid executable identifier
|
||||
|
||||
|
||||
/**********************************************************************//**
|
||||
* Helper macros
|
||||
**************************************************************************/
|
||||
#define xstr(a) str(a)
|
||||
#define str(a) #a
|
||||
|
||||
#endif // MAIN_H
|
||||
Loading…
Add table
Add a link
Reference in a new issue