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[rtl] cpu: print config info only for core 0

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stnolting 2025-01-11 22:34:30 +01:00
parent 39f8a19da4
commit 76f157e690
1 changed files with 49 additions and 44 deletions
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93
rtl/core/neorv32_cpu.vhd
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@ -136,52 +136,57 @@ begin
-- Configuration Info and Sanity Checks ---------------------------------------------------
-- -------------------------------------------------------------------------------------------
-- CPU ISA configuration (in alphabetical order - not in canonical order!) --
assert false report "[NEORV32] CPU ISA: rv32" &
cond_sel_string_f(RISCV_ISA_E, "e", "i") &
cond_sel_string_f(riscv_b_c, "b", "" ) &
cond_sel_string_f(RISCV_ISA_C, "c", "" ) &
cond_sel_string_f(RISCV_ISA_M, "m", "" ) &
cond_sel_string_f(RISCV_ISA_U, "u", "" ) &
cond_sel_string_f(true, "x", "" ) & -- always enabled
cond_sel_string_f(RISCV_ISA_Zaamo, "_zaamo", "" ) &
cond_sel_string_f(RISCV_ISA_Zba, "_zba", "" ) &
cond_sel_string_f(RISCV_ISA_Zbb, "_zbb", "" ) &
cond_sel_string_f(RISCV_ISA_Zbkb, "_zbkb", "" ) &
cond_sel_string_f(RISCV_ISA_Zbkc, "_zbkc", "" ) &
cond_sel_string_f(RISCV_ISA_Zbkx, "_zbkx", "" ) &
cond_sel_string_f(RISCV_ISA_Zbs, "_zbs", "" ) &
cond_sel_string_f(RISCV_ISA_Zicntr, "_zicntr", "" ) &
cond_sel_string_f(RISCV_ISA_Zicond, "_zicond", "" ) &
cond_sel_string_f(true, "_zicsr", "" ) & -- always enabled
cond_sel_string_f(true, "_zifencei", "" ) & -- always enabled
cond_sel_string_f(RISCV_ISA_Zihpm, "_zihpm", "" ) &
cond_sel_string_f(RISCV_ISA_Zfinx, "_zfinx", "" ) &
cond_sel_string_f(riscv_zkn_c, "_zkn", "" ) &
cond_sel_string_f(RISCV_ISA_Zknd, "_zknd", "" ) &
cond_sel_string_f(RISCV_ISA_Zkne, "_zkne", "" ) &
cond_sel_string_f(RISCV_ISA_Zknh, "_zknh", "" ) &
cond_sel_string_f(riscv_zks_c, "_zks", "" ) &
cond_sel_string_f(RISCV_ISA_Zksed, "_zksed", "" ) &
cond_sel_string_f(RISCV_ISA_Zksh, "_zksh", "" ) &
cond_sel_string_f(riscv_zkt_c, "_zkt", "" ) &
cond_sel_string_f(RISCV_ISA_Zmmul, "_zmmul", "" ) &
cond_sel_string_f(RISCV_ISA_Zxcfu, "_zxcfu", "" ) &
cond_sel_string_f(RISCV_ISA_Sdext, "_sdext", "" ) &
cond_sel_string_f(RISCV_ISA_Sdtrig, "_sdtrig", "" ) &
cond_sel_string_f(RISCV_ISA_Smpmp, "_smpmp", "" )
severity note;
hello_neorv32:
if HART_ID = 0 generate -- print only for core 0
-- CPU tuning options --
assert false report "[NEORV32] CPU tuning options: " &
cond_sel_string_f(CPU_CLOCK_GATING_EN, "clock_gating ", "") &
cond_sel_string_f(CPU_FAST_MUL_EN, "fast_mul ", "") &
cond_sel_string_f(CPU_FAST_SHIFT_EN, "fast_shift ", "") &
cond_sel_string_f(CPU_RF_HW_RST_EN, "rf_hw_rst ", "")
severity note;
-- CPU ISA configuration (in alphabetical order - not in canonical order!) --
assert false report "[NEORV32] CPU ISA: rv32" &
cond_sel_string_f(RISCV_ISA_E, "e", "i") &
cond_sel_string_f(riscv_b_c, "b", "" ) &
cond_sel_string_f(RISCV_ISA_C, "c", "" ) &
cond_sel_string_f(RISCV_ISA_M, "m", "" ) &
cond_sel_string_f(RISCV_ISA_U, "u", "" ) &
cond_sel_string_f(true, "x", "" ) & -- always enabled
cond_sel_string_f(RISCV_ISA_Zaamo, "_zaamo", "" ) &
cond_sel_string_f(RISCV_ISA_Zba, "_zba", "" ) &
cond_sel_string_f(RISCV_ISA_Zbb, "_zbb", "" ) &
cond_sel_string_f(RISCV_ISA_Zbkb, "_zbkb", "" ) &
cond_sel_string_f(RISCV_ISA_Zbkc, "_zbkc", "" ) &
cond_sel_string_f(RISCV_ISA_Zbkx, "_zbkx", "" ) &
cond_sel_string_f(RISCV_ISA_Zbs, "_zbs", "" ) &
cond_sel_string_f(RISCV_ISA_Zicntr, "_zicntr", "" ) &
cond_sel_string_f(RISCV_ISA_Zicond, "_zicond", "" ) &
cond_sel_string_f(true, "_zicsr", "" ) & -- always enabled
cond_sel_string_f(true, "_zifencei", "" ) & -- always enabled
cond_sel_string_f(RISCV_ISA_Zihpm, "_zihpm", "" ) &
cond_sel_string_f(RISCV_ISA_Zfinx, "_zfinx", "" ) &
cond_sel_string_f(riscv_zkn_c, "_zkn", "" ) &
cond_sel_string_f(RISCV_ISA_Zknd, "_zknd", "" ) &
cond_sel_string_f(RISCV_ISA_Zkne, "_zkne", "" ) &
cond_sel_string_f(RISCV_ISA_Zknh, "_zknh", "" ) &
cond_sel_string_f(riscv_zks_c, "_zks", "" ) &
cond_sel_string_f(RISCV_ISA_Zksed, "_zksed", "" ) &
cond_sel_string_f(RISCV_ISA_Zksh, "_zksh", "" ) &
cond_sel_string_f(riscv_zkt_c, "_zkt", "" ) &
cond_sel_string_f(RISCV_ISA_Zmmul, "_zmmul", "" ) &
cond_sel_string_f(RISCV_ISA_Zxcfu, "_zxcfu", "" ) &
cond_sel_string_f(RISCV_ISA_Sdext, "_sdext", "" ) &
cond_sel_string_f(RISCV_ISA_Sdtrig, "_sdtrig", "" ) &
cond_sel_string_f(RISCV_ISA_Smpmp, "_smpmp", "" )
severity note;
-- simulation notifier --
assert not is_simulation_c report "[NEORV32] Assuming this is a simulation." severity warning;
-- CPU tuning options --
assert false report "[NEORV32] CPU tuning options: " &
cond_sel_string_f(CPU_CLOCK_GATING_EN, "clock_gating ", "") &
cond_sel_string_f(CPU_FAST_MUL_EN, "fast_mul ", "") &
cond_sel_string_f(CPU_FAST_SHIFT_EN, "fast_shift ", "") &
cond_sel_string_f(CPU_RF_HW_RST_EN, "rf_hw_rst ", "")
severity note;
-- simulation notifier --
assert not is_simulation_c report "[NEORV32] Assuming this is a simulation." severity warning;
end generate;
-- Clock Gating ---------------------------------------------------------------------------