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🐛 [sw] fixed mip CSR handling

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stnolting 2022-02-24 05:22:30 +01:00
parent d56847e5ea
commit 7c0db9f0e2
4 changed files with 7 additions and 7 deletions
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2
sw/example/demo_gptmr/main.c
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@ -113,7 +113,7 @@ int main() {
**************************************************************************/
void gptmr_firq_handler(void) {
neorv32_cpu_csr_write(CSR_MIP, 1<<GPTMR_FIRQ_PENDING); // clear/ack pending FIRQ
neorv32_cpu_csr_write(CSR_MIP, ~(1<<GPTMR_FIRQ_PENDING)); // clear/ack pending FIRQ
neorv32_uart0_putc('.'); // send tick symbol via UART0
neorv32_gpio_pin_toggle(0); // toggle output port bit 0

6
sw/example/demo_slink/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -475,7 +475,7 @@ void slink_write(void) {
**************************************************************************/
void slink_rx_firq_handler(void) {
neorv32_cpu_csr_write(CSR_MIP, 1 << SLINK_RX_FIRQ_PENDING); // ACK interrupt
neorv32_cpu_csr_write(CSR_MIP, ~(1 << SLINK_RX_FIRQ_PENDING)); // ACK interrupt
neorv32_uart0_printf("\n<SLINK_RX_IRQ>\n");
}
@ -485,7 +485,7 @@ void slink_rx_firq_handler(void) {
**************************************************************************/
void slink_tx_firq_handler(void) {
neorv32_cpu_csr_write(CSR_MIP, 1 << SLINK_TX_FIRQ_PENDING); // ACK interrupt
neorv32_cpu_csr_write(CSR_MIP, ~(1 << SLINK_TX_FIRQ_PENDING)); // ACK interrupt
neorv32_uart0_printf("\n<SLINK_TX_IRQ>\n");
}

2
sw/example/processor_check/main.c
View file

@ -1804,7 +1804,7 @@ void sim_irq_trigger(uint32_t sel) {
void global_trap_handler(void) {
// clear all pending FIRQs
neorv32_cpu_csr_write(CSR_MIP, -1);
neorv32_cpu_csr_write(CSR_MIP, 0);
// hack: always come back in MACHINE MODE
register uint32_t mask = (1<<CSR_MSTATUS_MPP_H) | (1<<CSR_MSTATUS_MPP_L);

4
sw/lib/source/neorv32_xirq.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -238,7 +238,7 @@ static void __attribute__((aligned(16))) __neorv32_xirq_core(void) {
uint32_t mask = 1 << src;
NEORV32_XIRQ.IPR = ~mask; // clear current pending interrupt
neorv32_cpu_csr_write(CSR_MIP, 1 << XIRQ_FIRQ_PENDING); // acknowledge XIRQ FIRQ
neorv32_cpu_csr_write(CSR_MIP, ~(1 << XIRQ_FIRQ_PENDING)); // acknowledge XIRQ FIRQ
NEORV32_XIRQ.SCR = 0; // acknowledge current XIRQ interrupt source