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[docs] updated links to neorv32-setups
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@ -42,7 +42,7 @@ are executed. Whenever an unexpected situation occurs the application code is in
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:label: The project's change log is available in [`CHANGELOG.md`](https://github.com/stnolting/neorv32/blob/master/CHANGELOG.md).
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:label: The project's change log is available in [`CHANGELOG.md`](https://github.com/stnolting/neorv32/blob/master/CHANGELOG.md).
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To see the changes between _official releases_ visit the project's [release page](https://github.com/stnolting/neorv32/releases).
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To see the changes between _official releases_ visit the project's [release page](https://github.com/stnolting/neorv32/releases).
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:package: [Exemplary setups](https://github.com/stnolting/neorv32/tree/master/setups) targeting
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:package: [Exemplary setups](https://github.com/stnolting/neorv32-setups) targeting
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various FPGA boards and toolchains to get you started.
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various FPGA boards and toolchains to get you started.
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:kite: Supported by upstream [Zephyr OS](https://docs.zephyrproject.org/latest/boards/riscv/neorv32/doc/index.html) and FreeRTOS.
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:kite: Supported by upstream [Zephyr OS](https://docs.zephyrproject.org/latest/boards/riscv/neorv32/doc/index.html) and FreeRTOS.
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@ -139,10 +139,10 @@ Section [_FPGA Implementation Results - Processor Modules_](https://stnolting.gi
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of the online datasheet shows the resource utilization of each optional processor module to allow an
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of the online datasheet shows the resource utilization of each optional processor module to allow an
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estimation of the actual setup's hardware requirements.
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estimation of the actual setup's hardware requirements.
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The [`setups`](https://github.com/stnolting/neorv32/tree/master/setups) folder provides exemplary FPGA
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:bulb: The [`neorv32-setups`](https://github.com/stnolting/neorv32-setups) repository provides exemplary FPGA
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setups targeting various FPGA boards and toolchains. These setups also provide resource utilization reports for different
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setups targeting various FPGA boards and toolchains. These setups also provide resource utilization reports for different
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SoC configurations. The latest utilization reports for those setups can be found in the report of the
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SoC configurations. The latest utilization reports for those setups can be found in the report of the
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[Implementation Workflow](https://github.com/stnolting/neorv32/actions/workflows/Implementation.yml).
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[Implementation Workflow](https://github.com/stnolting/neorv32-setups/actions/workflows/Implementation.yml).
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[[back to top](#The-NEORV32-RISC-V-Processor)]
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[[back to top](#The-NEORV32-RISC-V-Processor)]
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@ -167,9 +167,6 @@ neorv32 - Project home folder
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│├system_integration - System wrappers for advanced connectivity
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│├system_integration - System wrappers for advanced connectivity
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│└test_setups - Minimal test setup "SoCs" used in the User Guide
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│└test_setups - Minimal test setup "SoCs" used in the User Guide
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│
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│
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├setups - Example setups for various FPGAs, boards and toolchains
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│└...
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│
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├sim - Simulation files (see User Guide)
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├sim - Simulation files (see User Guide)
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│
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│
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└sw - Software framework
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└sw - Software framework
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@ -347,7 +344,7 @@ https://stnolting.github.io/neorv32/ug/#_application_specific_processor_configur
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:sectnums:
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:sectnums:
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==== Exemplary Setups
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==== Exemplary Setups
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Check out the `setups` folder (@GitHub: https://github.com/stnolting/neorv32/tree/master/setups),
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Check out the `neorv32-setups` repository (@GitHub: https://github.com/stnolting/neorv32-setups),
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which provides several demo setups for various FPGA boards and toolchains.
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which provides several demo setups for various FPGA boards and toolchains.
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@ -43,7 +43,7 @@ For a _general_ first setup (technology-independent) use the `*.default.vhd` mem
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(IMEM and DMEM). These are located in `rtl/core/mem` so make sure to add the files to your project, too. +
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(IMEM and DMEM). These are located in `rtl/core/mem` so make sure to add the files to your project, too. +
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+
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+
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If synthesis cannot efficiently map those default memory descriptions to the available memory resources, you can later replace the
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If synthesis cannot efficiently map those default memory descriptions to the available memory resources, you can later replace the
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default memory architectures by optimized platform-specific memory architectures. **Example:** The `setups/radiant/UPduino_v3`
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default memory architectures by optimized platform-specific memory architectures. **Example:** The `neorv32-setups/radiant/UPduino_v3`
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example setup uses optimized memory primitives. Hence, it does not include the default memory architectures from
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example setup uses optimized memory primitives. Hence, it does not include the default memory architectures from
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`rtl/core/mem` as these are replaced by device-specific implementations. However, it still has to include the entity
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`rtl/core/mem` as these are replaced by device-specific implementations. However, it still has to include the entity
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definitions from `rtl/core`.
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definitions from `rtl/core`.
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