[docs] updated links to neorv32-setups

README.md

@@ -42,7 +42,7 @@ are executed. Whenever an unexpected situation occurs the application code is in
 :label: The project's change log is available in [`CHANGELOG.md`](https://github.com/stnolting/neorv32/blob/master/CHANGELOG.md).
 To see the changes between _official releases_ visit the project's [release page](https://github.com/stnolting/neorv32/releases).
 
-:package: [Exemplary setups](https://github.com/stnolting/neorv32/tree/master/setups) targeting
+:package: [Exemplary setups](https://github.com/stnolting/neorv32-setups) targeting
 various FPGA boards and toolchains to get you started.
 
 :kite: Supported by upstream [Zephyr OS](https://docs.zephyrproject.org/latest/boards/riscv/neorv32/doc/index.html) and FreeRTOS.
@@ -139,10 +139,10 @@ Section [_FPGA Implementation Results - Processor Modules_](https://stnolting.gi
 of the online datasheet shows the resource utilization of each optional processor module to allow an
 estimation of the actual setup's hardware requirements.
 
-The [`setups`](https://github.com/stnolting/neorv32/tree/master/setups) folder provides exemplary FPGA
+:bulb: The [`neorv32-setups`](https://github.com/stnolting/neorv32-setups) repository provides exemplary FPGA
 setups targeting various FPGA boards and toolchains. These setups also provide resource utilization reports for different
 SoC configurations. The latest utilization reports for those setups can be found in the report of the
-[Implementation Workflow](https://github.com/stnolting/neorv32/actions/workflows/Implementation.yml).
+[Implementation Workflow](https://github.com/stnolting/neorv32-setups/actions/workflows/Implementation.yml).
 
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docs/datasheet/overview.adoc

@@ -167,9 +167,6 @@ neorv32                - Project home folder
 │├system_integration   - System wrappers for advanced connectivity
 │└test_setups          - Minimal test setup "SoCs" used in the User Guide
 │
-├setups                - Example setups for various FPGAs, boards and toolchains
-│└...
-│
 ├sim                   - Simulation files (see User Guide)
 │
 └sw                    - Software framework
@@ -347,7 +344,7 @@ https://stnolting.github.io/neorv32/ug/#_application_specific_processor_configur
 :sectnums:
 ==== Exemplary Setups
 
-Check out the `setups` folder (@GitHub: https://github.com/stnolting/neorv32/tree/master/setups),
+Check out the `neorv32-setups` repository (@GitHub: https://github.com/stnolting/neorv32-setups),
 which provides several demo setups for various FPGA boards and toolchains.
 
 

docs/userguide/general_hw_setup.adoc

@@ -43,7 +43,7 @@ For a _general_ first setup (technology-independent) use the `*.default.vhd` mem
 (IMEM and DMEM). These are located in `rtl/core/mem` so make sure to add the files to your project, too. +
  +
 If synthesis cannot efficiently map those default memory descriptions to the available memory resources, you can later replace the
-default memory architectures by optimized platform-specific memory architectures. **Example:** The `setups/radiant/UPduino_v3`
+default memory architectures by optimized platform-specific memory architectures. **Example:** The `neorv32-setups/radiant/UPduino_v3`
 example setup uses optimized memory primitives. Hence, it does not include the default memory architectures from
 `rtl/core/mem` as these are replaced by device-specific implementations. However, it still has to include the entity
 definitions from `rtl/core`.