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[sw] rename get num. HPMs function

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This commit is contained in:
stnolting 2022-06-01 06:39:36 +02:00
parent 4b1bd5cbc8
commit 896294888d
6 changed files with 8 additions and 8 deletions
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2
sw/example/coremark/core_portme.c
View file

@ -167,7 +167,7 @@ portable_init(core_portable *p, int *argc, char *argv[])
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
num_hpm_cnts_global = neorv32_cpu_hpm_get_counters();
num_hpm_cnts_global = neorv32_cpu_hpm_get_num_counters();
// try to setup as many HPMs as possible
neorv32_cpu_csr_write(CSR_MHPMCOUNTER3, 0); neorv32_cpu_csr_write(CSR_MHPMEVENT3, 1 << HPMCNT_EVENT_CIR);

6
sw/example/demo_hpm/main.c
View file

@ -77,7 +77,7 @@ int main() {
}
// check if at least one HPM counter is implemented
if (neorv32_cpu_hpm_get_counters() == 0) {
if (neorv32_cpu_hpm_get_num_counters() == 0) {
neorv32_uart0_printf("ERROR! No HPM counters implemented!\n");
return 1;
}
@ -89,7 +89,7 @@ int main() {
// show HPM hardware configuration
uint32_t hpm_num = neorv32_cpu_hpm_get_counters();
uint32_t hpm_num = neorv32_cpu_hpm_get_num_counters();
uint32_t hpm_width = neorv32_cpu_hpm_get_size();
neorv32_uart0_printf("Check: %u HPM counters detected, each %u bits wide\n", hpm_num, hpm_width);
@ -152,7 +152,7 @@ int main() {
neorv32_uart0_printf(" > An exception (environment call) handled by the RTE: ");
asm volatile ("ecall"); // environment call
neorv32_uart0_printf(" > An invalid instruction handled by the RTE: ");
asm volatile ("csrwi marchid, 1"); // illegal instruction (writing to read-only CSR
asm volatile ("csrwi marchid, 1"); // illegal instruction (writing to read-only CSR)
}

2
sw/example/processor_check/main.c
View file

@ -247,7 +247,7 @@ int main() {
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
PRINT_STANDARD("[%i] Setup HPM events ", cnt_test);
num_hpm_cnts_global = neorv32_cpu_hpm_get_counters();
num_hpm_cnts_global = neorv32_cpu_hpm_get_num_counters();
if (num_hpm_cnts_global != 0) {
cnt_test++;

2
sw/lib/include/neorv32_cpu.h
View file

@ -53,7 +53,7 @@ void neorv32_cpu_delay_ms(uint32_t time_ms);
uint32_t neorv32_cpu_pmp_get_num_regions(void);
uint32_t neorv32_cpu_pmp_get_granularity(void);
int neorv32_cpu_pmp_configure_region(uint32_t index, uint32_t base, uint8_t config);
uint32_t neorv32_cpu_hpm_get_counters(void);
uint32_t neorv32_cpu_hpm_get_num_counters(void);
uint32_t neorv32_cpu_hpm_get_size(void);
uint32_t neorv32_cpu_cnt_get_size(void);
void neorv32_cpu_goto_user_mode(void);

2
sw/lib/source/neorv32_cpu.c
View file

@ -515,7 +515,7 @@ static void __neorv32_cpu_pmp_cfg_write(uint32_t index, uint32_t data) {
*
* @return Returns number of available HPM counters (0..29).
**************************************************************************/
uint32_t neorv32_cpu_hpm_get_counters(void) {
uint32_t neorv32_cpu_hpm_get_num_counters(void) {
// HPMs implemented at all?
if ((neorv32_cpu_csr_read(CSR_MXISA) & (1<<CSR_MXISA_ZIHPM)) == 0) {

2
sw/lib/source/neorv32_rte.c
View file

@ -392,7 +392,7 @@ void neorv32_rte_print_hw_config(void) {
// check hardware performance monitors
neorv32_uart0_printf("\nHW Perf. Monitors: ");
uint32_t hpm_num = neorv32_cpu_hpm_get_counters();
uint32_t hpm_num = neorv32_cpu_hpm_get_num_counters();
if (hpm_num != 0) {
neorv32_uart0_printf("%u counter(s), %u bit", hpm_num, neorv32_cpu_hpm_get_size());
}