github-mirrors/neorv32
1
0
Fork 0
mirror of https://github.com/stnolting/neorv32.git synced 2025-04-24 14:17:51 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

[docs] remove trailing spaces

Browse source
This commit is contained in:
stnolting 2024-03-23 21:22:56 +01:00
parent 336acae768
commit 8eecf78636
2 changed files with 4 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

1
docs/datasheet/soc_spi.adoc
View file

@ -35,7 +35,6 @@ and not by an external SPI module. If you are looking for a _device-mode_ serial
initiated by an external host) check out the <<_serial_data_interface_controller_sdi>>.
**Theory of Operation**
The SPI module is enabled by setting the `SPI_CTRL_EN` bit in the `CTRL` control register. No transfer can be initiated

1
docs/datasheet/soc_uart.adoc
View file

@ -82,6 +82,7 @@ Furthermore, a pending UART interrupt has to be explicitly cleared again by writ
Software can retrieve the configured sizes of the RX and TX FIFO via the according `UART_DATA_RX_FIFO_SIZE` and
`UART_DATA_TX_FIFO_SIZE` bits from the `DATA` register.
**RTS/CTS Hardware Flow Control**
The NEORV32 UART supports optional hardware flow control using the standard CTS `uart0_cts_i` ("clear to send") and RTS