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⚠️ remove CUSTOM_ID generic

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stnolting 2023-07-27 09:52:26 +02:00
parent ecea84740f
commit 9b386cc2ae
7 changed files with 0 additions and 12 deletions
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1
docs/datasheet/soc.adoc
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@ -203,7 +203,6 @@ The generic type "`suv(x:y)`" is an abbreviation for "`std_ulogic_vector(x downt
| `INT_BOOTLOADER_EN` | boolean | false | Implement the processor-internal <<_bootloader_rom_bootrom>>, pre-initialized with the default <<_bootloader>> image.
| `HART_ID` | suv(31:0) | 0x00000000 | The hart thread ID of the CPU (passed to <<_mhartid>> CSRs).
| `VENDOR_ID` | suv(31:0) | 0x00000000 | JEDEC ID (passed to <<_mvendorid>> CSRs).
| `CUSTOM_ID` | suv(31:0) | 0x00000000 | User-defined identifier to identify a certain setup or to pass user-defined flags to software (via the <<_system_configuration_information_memory_sysinfo>>).
| `ON_CHIP_DEBUGGER_EN` | boolean | false | Implement the on-chip debugger <<_on_chip_debugger_ocd>> and the CPU debug mode.
4+^| **CPU <<_instruction_sets_and_extensions>>**
| `CPU_EXTENSION_RISCV_A` | boolean | false | Enable <<_a_isa_extension>> (atomic memory accesses).

2
rtl/core/neorv32_top.vhd
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@ -50,7 +50,6 @@ entity neorv32_top is
CLOCK_FREQUENCY : natural; -- clock frequency of clk_i in Hz
HART_ID : std_ulogic_vector(31 downto 0) := x"00000000"; -- hardware thread ID
VENDOR_ID : std_ulogic_vector(31 downto 0) := x"00000000"; -- vendor's JEDEC ID
CUSTOM_ID : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom user-defined ID
INT_BOOTLOADER_EN : boolean := false; -- boot configuration: true = boot explicit bootloader; false = boot from int/ext (I)MEM
-- On-Chip Debugger (OCD) --
@ -1469,7 +1468,6 @@ begin
generic map (
-- General --
CLOCK_FREQUENCY => CLOCK_FREQUENCY,
CUSTOM_ID => CUSTOM_ID,
INT_BOOTLOADER_EN => INT_BOOTLOADER_EN,
-- Physical memory protection (PMP) --
PMP_NUM_REGIONS => PMP_NUM_REGIONS,

2
rtl/system_integration/neorv32_SystemTop_AvalonMM.vhd
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@ -48,7 +48,6 @@ entity neorv32_top_avalonmm is
CLOCK_FREQUENCY : natural; -- clock frequency of clk_i in Hz
HART_ID : std_ulogic_vector(31 downto 0) := x"00000000"; -- hardware thread ID
VENDOR_ID : std_ulogic_vector(31 downto 0) := x"00000000"; -- vendor's JEDEC ID
CUSTOM_ID : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom user-defined ID
INT_BOOTLOADER_EN : boolean := false; -- boot configuration: true = boot explicit bootloader; false = boot from int/ext (I)MEM
-- On-Chip Debugger (OCD) --
@ -235,7 +234,6 @@ begin
CLOCK_FREQUENCY => CLOCK_FREQUENCY,
HART_ID => HART_ID,
VENDOR_ID => VENDOR_ID,
CUSTOM_ID => CUSTOM_ID,
-- On-Chip Debugger (OCD) --
ON_CHIP_DEBUGGER_EN => ON_CHIP_DEBUGGER_EN,

3
rtl/system_integration/neorv32_SystemTop_axi4lite.vhd
View file

@ -51,7 +51,6 @@ entity neorv32_SystemTop_axi4lite is
CLOCK_FREQUENCY : natural := 0; -- clock frequency of clk_i in Hz
HART_ID : std_ulogic_vector(31 downto 0) := x"00000000"; -- hardware thread ID
VENDOR_ID : std_ulogic_vector(31 downto 0) := x"00000000"; -- vendor's JEDEC ID
CUSTOM_ID : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom user-defined ID
INT_BOOTLOADER_EN : boolean := true; -- boot configuration: true = boot explicit bootloader; false = boot from int/ext (I)MEM
-- On-Chip Debugger (OCD) --
ON_CHIP_DEBUGGER_EN : boolean := false; -- implement on-chip debugger
@ -212,7 +211,6 @@ end entity;
architecture neorv32_SystemTop_axi4lite_rtl of neorv32_SystemTop_axi4lite is
-- type conversion --
constant CUSTOM_ID_INT : std_ulogic_vector(31 downto 0) := std_ulogic_vector(CUSTOM_ID);
constant IO_CFS_CONFIG_INT : std_ulogic_vector(31 downto 0) := std_ulogic_vector(IO_CFS_CONFIG);
constant XIRQ_TRIGGER_TYPE_INT : std_ulogic_vector(31 downto 0) := std_ulogic_vector(XIRQ_TRIGGER_TYPE);
constant XIRQ_TRIGGER_POLARITY_INT : std_ulogic_vector(31 downto 0) := std_ulogic_vector(XIRQ_TRIGGER_POLARITY);
@ -305,7 +303,6 @@ begin
CLOCK_FREQUENCY => CLOCK_FREQUENCY, -- clock frequency of clk_i in Hz
HART_ID => HART_ID, -- hardware thread ID
VENDOR_ID => VENDOR_ID, -- vendor's JEDEC ID
CUSTOM_ID => CUSTOM_ID, -- custom user-defined ID
INT_BOOTLOADER_EN => INT_BOOTLOADER_EN, -- boot configuration: true = boot explicit bootloader; false = boot from int/ext (I)MEM
-- On-Chip Debugger (OCD) --
ON_CHIP_DEBUGGER_EN => ON_CHIP_DEBUGGER_EN, -- implement on-chip debugger

2
rtl/system_integration/neorv32_litex_core_complex.vhd
View file

@ -111,7 +111,6 @@ architecture neorv32_litex_core_complex_rtl of neorv32_litex_core_complex is
-- identifiers --
constant hart_id_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- hardware thread ID ("core ID")
constant jedec_id_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- vendor's JEDEC manufacturer ID
constant user_id_c : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom user ID
-- advanced configuration --
constant num_configs_c : natural := 4; -- number of pre-defined configurations
@ -173,7 +172,6 @@ begin
CLOCK_FREQUENCY => 0, -- clock frequency of clk_i in Hz [not required by the core complex]
HART_ID => hart_id_c, -- hardware thread ID
VENDOR_ID => jedec_id_c, -- vendor's JEDEC ID
CUSTOM_ID => user_id_c, -- custom user-defined ID
-- On-Chip Debugger (OCD) --
ON_CHIP_DEBUGGER_EN => DEBUG, -- implement on-chip debugger
-- RISC-V CPU Extensions --

1
sim/neorv32_tb.vhd
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@ -220,7 +220,6 @@ begin
CLOCK_FREQUENCY => f_clock_c, -- clock frequency of clk_i in Hz
HART_ID => x"00000000", -- hardware thread ID
VENDOR_ID => x"00000000", -- vendor's JEDEC ID
CUSTOM_ID => x"12345678", -- custom user-defined ID
INT_BOOTLOADER_EN => false, -- boot configuration: true = boot explicit bootloader; false = boot from int/ext (I)MEM
-- On-Chip Debugger (OCD) --
ON_CHIP_DEBUGGER_EN => true, -- implement on-chip debugger

1
sim/simple/neorv32_tb.simple.vhd
View file

@ -163,7 +163,6 @@ begin
CLOCK_FREQUENCY => f_clock_c, -- clock frequency of clk_i in Hz
HART_ID => x"00000000", -- hardware thread ID
VENDOR_ID => x"00000000", -- vendor's JEDEC ID
CUSTOM_ID => x"12345678", -- custom user-defined ID
INT_BOOTLOADER_EN => false, -- boot configuration: true = boot explicit bootloader; false = boot from int/ext (I)MEM
-- On-Chip Debugger (OCD) --
ON_CHIP_DEBUGGER_EN => true, -- implement on-chip debugger