mirror of
https://github.com/stnolting/neorv32.git
synced 2025-04-23 13:47:33 -04:00
[bootloader] fix endianness
minor clean-ups; changed default flash base address to 0x02000000
This commit is contained in:
parent
e8d7134c56
commit
9f08db334f
1 changed files with 31 additions and 27 deletions
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@ -125,7 +125,7 @@
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/** SPI flash boot base address */
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#ifndef SPI_BOOT_BASE_ADDR
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#define SPI_BOOT_BASE_ADDR 0x08000000
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#define SPI_BOOT_BASE_ADDR 0x02000000
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#endif
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/**@}*/
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@ -152,11 +152,11 @@ enum ERROR_CODES {
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/**********************************************************************//**
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* Error messages
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**************************************************************************/
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const char error_message[4][24] = {
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"exe signature error",
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"exceeding IMEM capacity",
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const char error_message[4][16] = {
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"signature error",
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"exceeding IMEM",
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"checksum error",
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"SPI flash access error"
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"SPI flash error"
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};
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@ -280,7 +280,7 @@ int main(void) {
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while(1) {
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asm volatile ("nop");
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}
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return 0; // should never be reached
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return 0; // bootloader should never return
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#endif
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@ -358,8 +358,8 @@ int main(void) {
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// Configure machine system timer interrupt
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if (neorv32_mtime_available()) {
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neorv32_mtime_set_timecmp(0 + (NEORV32_SYSINFO.CLK/4));
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// active timer IRQ
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NEORV32_MTIME.TIMECMP_LO = NEORV32_SYSINFO.CLK/4;
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NEORV32_MTIME.TIMECMP_HI = 0;
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neorv32_cpu_csr_write(CSR_MIE, 1 << CSR_MIE_MTIE); // activate MTIME IRQ source only!
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neorv32_cpu_eint(); // enable global interrupts
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}
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@ -463,14 +463,14 @@ int main(void) {
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}
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}
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else if (c == '?') {
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PRINT_TEXT("(c) by Stephan Nolting\nhttps://github.com/stnolting/neorv32");
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PRINT_TEXT("(c) by Stephan Nolting\ngithub.com/stnolting/neorv32");
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}
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else { // unknown command
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PRINT_TEXT("Invalid CMD");
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}
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}
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return 1; // bootloader should never return
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return 0; // bootloader should never return
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}
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@ -506,7 +506,7 @@ void start_app(void) {
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// start app at instruction space base address
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register uint32_t app_base = NEORV32_SYSINFO.ISPACE_BASE;
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asm volatile ("jalr zero, %0" : : "r" (app_base));
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asm volatile ("jalr ra, %0" : : "r" (app_base));
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while (1);
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}
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@ -520,10 +520,10 @@ void start_app(void) {
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**************************************************************************/
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void __attribute__((__interrupt__)) bootloader_trap_handler(void) {
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register uint32_t cause = neorv32_cpu_csr_read(CSR_MCAUSE);
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register uint32_t mcause = neorv32_cpu_csr_read(CSR_MCAUSE);
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// Machine timer interrupt
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if (cause == TRAP_CODE_MTI) { // raw exception code for MTI
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if (mcause == TRAP_CODE_MTI) { // raw exception code for MTI
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#if (STATUS_LED_EN != 0)
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if (neorv32_gpio_available()) {
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neorv32_gpio_pin_toggle(STATUS_LED_PIN); // toggle status LED
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@ -536,25 +536,25 @@ void __attribute__((__interrupt__)) bootloader_trap_handler(void) {
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}
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// Bus store access error during get_exe
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else if ((cause == TRAP_CODE_S_ACCESS) && (getting_exe)) {
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else if ((mcause == TRAP_CODE_S_ACCESS) && (getting_exe)) {
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system_error(ERROR_SIZE); // -> seems like executable is too large
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}
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// Anything else (that was not expected); output exception notifier and try to resume
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else {
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register uint32_t epc = neorv32_cpu_csr_read(CSR_MEPC);
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register uint32_t mepc = neorv32_cpu_csr_read(CSR_MEPC);
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#if (UART_EN != 0)
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if (neorv32_uart0_available()) {
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PRINT_TEXT("\n[ERROR - Unexpected exception! mcause=");
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PRINT_XNUM(cause); // MCAUSE
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PRINT_XNUM(mcause);
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PRINT_TEXT(" mepc=");
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PRINT_XNUM(epc); // MEPC
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PRINT_XNUM(mepc);
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PRINT_TEXT(" mtval=");
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PRINT_XNUM(neorv32_cpu_csr_read(CSR_MTVAL)); // MTVAL
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PRINT_TEXT("] trying to resume...\n");
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PRINT_XNUM(neorv32_cpu_csr_read(CSR_MTVAL));
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PRINT_TEXT("]\n");
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}
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#endif
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neorv32_cpu_csr_write(CSR_MEPC, epc + 4); // advance to next instruction
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neorv32_cpu_csr_write(CSR_MEPC, mepc + 4); // advance to next instruction
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}
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}
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@ -577,10 +577,12 @@ void get_exe(int src) {
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}
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#if (SPI_EN != 0)
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else {
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PRINT_TEXT("Loading... ");
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PRINT_TEXT("Loading (@");
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PRINT_XNUM(addr);
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PRINT_TEXT(")...\n");
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// flash checks
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if (((NEORV32_SYSINFO.SOC & (1<<SYSINFO_SOC_IO_SPI)) == 0x00) || // SPI module implemented?
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if (((NEORV32_SYSINFO.SOC & (1<<SYSINFO_SOC_IO_SPI)) == 0) || // SPI module not implemented?
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(spi_flash_check() != 0)) { // check if flash ready (or available at all)
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system_error(ERROR_FLASH);
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}
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@ -641,7 +643,7 @@ void save_exe(void) {
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// info and prompt
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PRINT_TEXT("Write ");
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PRINT_XNUM(size);
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PRINT_TEXT(" bytes to SPI flash @0x");
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PRINT_TEXT(" bytes to SPI flash @ ");
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PRINT_XNUM(addr);
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PRINT_TEXT("? (y/n) ");
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@ -715,7 +717,7 @@ uint32_t get_exe_word(int src, uint32_t addr) {
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}
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#if (SPI_EN != 0)
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else {
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data.uint8[i] = spi_flash_read_byte(addr + (3-i));
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data.uint8[i] = spi_flash_read_byte(addr + i); // little-endian byte order
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}
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#endif
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}
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@ -758,7 +760,8 @@ void print_hex_word(uint32_t num) {
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#if (UART_EN != 0)
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static const char hex_symbols[16] = "0123456789abcdef";
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PRINT_TEXT("0x");
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PRINT_PUTC('0');
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PRINT_PUTC('x');
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int i;
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for (i=0; i<8; i++) {
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@ -870,9 +873,10 @@ void spi_flash_write_word(uint32_t addr, uint32_t wdata) {
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data.uint32 = wdata;
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// little-endian byte order
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int i;
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for (i=0; i<4; i++) {
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spi_flash_write_byte(addr + (3-i), data.uint8[i]);
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spi_flash_write_byte(addr + i, data.uint8[i]);
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}
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#endif
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}
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@ -953,7 +957,7 @@ uint32_t spi_flash_read_status(void) {
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/**********************************************************************//**
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* Send address word to flash (16-bit, 24-bit or 32-bit address size).
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* Send address word to flash (MSB-first, 16-bit, 24-bit or 32-bit address size).
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*
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* @param[in] addr Address word.
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**************************************************************************/
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