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https://github.com/stnolting/neorv32.git
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[sw/lib] rework GPIO HAL
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stnolting
parent
7685b63a1f
commit
a96dc5f7f6
2 changed files with 118 additions and 50 deletions
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@ -9,10 +9,6 @@
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/**
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* @file neorv32_gpio.h
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* @brief General purpose input/output port unit (GPIO) HW driver header file.
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*
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* @note These functions should only be used if the GPIO unit was synthesized (IO_GPIO_EN = true).
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*
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* @see https://stnolting.github.io/neorv32/sw/files.html
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*/
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#ifndef neorv32_gpio_h
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@ -27,8 +23,13 @@
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/**@{*/
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/** GPIO module prototype */
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typedef volatile struct __attribute__((packed,aligned(4))) {
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const uint32_t INPUT[2]; /**< offset 0: parallel input port, read-only */
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uint32_t OUTPUT[2]; /**< offset 8: parallel output port */
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const uint32_t PORT_IN; /**< parallel input port, read-only */
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uint32_t PORT_OUT; /**< parallel output port */
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const uint32_t reserved[2]; /**< reserved */
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uint32_t IRQ_TYPE; /**< trigger type (#GPIO_TRIGGER_enum MSB) */
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uint32_t IRQ_POLARITY; /**< trigger polarity (#GPIO_TRIGGER_enum LSB) */
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uint32_t IRQ_ENABLE; /**< interrupt enable */
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uint32_t IRQ_PENDING; /**< interrupt pending */
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} neorv32_gpio_t;
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/** GPIO module hardware access (#neorv32_gpio_t) */
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@ -36,6 +37,17 @@ typedef volatile struct __attribute__((packed,aligned(4))) {
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/**@}*/
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/**********************************************************************//**
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* @name Trigger types
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**************************************************************************/
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enum GPIO_TRIGGER_enum {
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GPIO_TRIG_LEVEL_LOW = 0b00, // low-level
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GPIO_TRIG_LEVEL_HIGH = 0b01, // high-level
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GPIO_TRIG_EDGE_FALLING = 0b10, // falling-edge
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GPIO_TRIG_EDGE_RISING = 0b11 // rising-edge
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};
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/**********************************************************************//**
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* @name Prototypes
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**************************************************************************/
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@ -44,9 +56,14 @@ int neorv32_gpio_available(void);
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void neorv32_gpio_pin_set(int pin, int value);
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void neorv32_gpio_pin_toggle(int pin);
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uint32_t neorv32_gpio_pin_get(int pin);
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void neorv32_gpio_port_set(uint64_t d);
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void neorv32_gpio_port_toggle(uint64_t toggle);
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uint64_t neorv32_gpio_port_get(void);
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void neorv32_gpio_port_set(uint32_t pin_mask);
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void neorv32_gpio_port_toggle(uint32_t pin_mask);
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uint32_t neorv32_gpio_port_get(void);
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void neorv32_gpio_irq_setup(int pin, int trigger);
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void neorv32_gpio_irq_enable(uint32_t pin_mask);
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void neorv32_gpio_irq_disable(uint32_t pin_mask);
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uint32_t neorv32_gpio_irq_get(void);
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void neorv32_gpio_irq_clr(uint32_t pin_mask);
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/**@}*/
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@ -1,7 +1,7 @@
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// ================================================================================ //
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// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
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// Copyright (c) NEORV32 contributors. //
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// Copyright (c) 2020 - 2024 Stephan Nolting. All rights reserved. //
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// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
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// Licensed under the BSD-3-Clause license, see LICENSE for details. //
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// SPDX-License-Identifier: BSD-3-Clause //
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// ================================================================================ //
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@ -9,10 +9,7 @@
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/**
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* @file neorv32_gpio.c
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* @brief General purpose input/output port unit (GPIO) HW driver source file.
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*
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* @note These functions should only be used if the GPIO unit was synthesized (IO_GPIO_EN = true).
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*
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* @see https://stnolting.github.io/neorv32/sw/files.html
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#include <neorv32.h>
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*/
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#include <neorv32.h>
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@ -37,19 +34,18 @@ int neorv32_gpio_available(void) {
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/**********************************************************************//**
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* Set single pin of GPIO's output port.
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*
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* @param[in] pin Output pin number to be set (0..63).
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* @param[in] pin Output pin number to be set (0..31).
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* @param[in] value Set pint high (1) or low (0).
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**************************************************************************/
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void neorv32_gpio_pin_set(int pin, int value) {
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uint32_t mask = (uint32_t)(1 << (pin & 0x1f));
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int lohi = (pin < 32) ? 0 : 1;
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uint32_t mask = (uint32_t)(1 << pin);
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if (value) {
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NEORV32_GPIO->OUTPUT[lohi] |= mask;
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NEORV32_GPIO->PORT_OUT |= mask;
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}
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else {
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NEORV32_GPIO->OUTPUT[lohi] &= ~mask;
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NEORV32_GPIO->PORT_OUT &= ~mask;
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}
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}
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@ -57,71 +53,126 @@ void neorv32_gpio_pin_set(int pin, int value) {
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/**********************************************************************//**
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* Toggle single pin of GPIO's output port.
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*
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* @param[in] pin Output pin number to be toggled (0..63).
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* @param[in] pin Output pin number to be toggled (0..31).
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**************************************************************************/
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void neorv32_gpio_pin_toggle(int pin) {
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uint32_t mask = (uint32_t)(1 << (pin & 0x1f));
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int lohi = (pin < 32) ? 0 : 1;
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NEORV32_GPIO->OUTPUT[lohi] ^= mask;
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NEORV32_GPIO->PORT_OUT ^= (uint32_t)(1 << pin);
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}
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/**********************************************************************//**
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* Get single pin of GPIO's input port.
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*
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* @param[in] pin Input pin to be read (0..63).
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* @return =0 if pin is low, !=0 if pin is high.
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* @param[in] pin Input pin to be read (0..31).
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* @return zero if pin is low, non-zero if pin is high.
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**************************************************************************/
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uint32_t neorv32_gpio_pin_get(int pin) {
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uint32_t mask = (uint32_t)(1 << (pin & 0x1f));
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int lohi = (pin < 32) ? 0 : 1;
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return NEORV32_GPIO->INPUT[lohi] & mask;
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return NEORV32_GPIO->PORT_IN & (uint32_t)(1 << pin);
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}
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/**********************************************************************//**
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* Set complete GPIO output port.
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*
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* @param[in] port_data New output port value (64-bit).
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* @param[in] pin_mask New output port value (32-bit).
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**************************************************************************/
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void neorv32_gpio_port_set(uint64_t port_data) {
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void neorv32_gpio_port_set(uint32_t pin_mask) {
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subwords64_t data;
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data.uint64 = port_data;
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NEORV32_GPIO->OUTPUT[0] = data.uint32[0];
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NEORV32_GPIO->OUTPUT[1] = data.uint32[1];
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NEORV32_GPIO->PORT_OUT = pin_mask;
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}
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/**********************************************************************//**
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* Toggle bit in entire GPIO output port.
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*
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* @param[in] toggle Bit mask; set bits will toggle the according output port (64-bit).
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* @param[in] pin_mask Bit mask; set bits will toggle the according output pins (32-bit).
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**************************************************************************/
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void neorv32_gpio_port_toggle(uint64_t toggle) {
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void neorv32_gpio_port_toggle(uint32_t pin_mask) {
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subwords64_t data;
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data.uint64 = toggle;
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NEORV32_GPIO->OUTPUT[0] ^= data.uint32[0];
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NEORV32_GPIO->OUTPUT[1] ^= data.uint32[1];
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NEORV32_GPIO->PORT_OUT ^= pin_mask;
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}
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/**********************************************************************//**
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* Get complete GPIO input port.
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*
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* @return Current input port state (64-bit).
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* @return Current input port state (32-bit).
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**************************************************************************/
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uint64_t neorv32_gpio_port_get(void) {
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uint32_t neorv32_gpio_port_get(void) {
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subwords64_t data;
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data.uint32[0] = NEORV32_GPIO->INPUT[0];
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data.uint32[1] = NEORV32_GPIO->INPUT[1];
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return data.uint64;
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return NEORV32_GPIO->PORT_IN;
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}
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/**********************************************************************//**
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* Configure pin interrupt trigger.
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*
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* @param[in] pin Input pin select (0..31).
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* @param[in] trigger Trigger select (#GPIO_TRIGGER_enum).
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**************************************************************************/
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void neorv32_gpio_irq_setup(int pin, int trigger) {
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uint32_t mask = (uint32_t)(1 << pin);
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// trigger type
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if ((trigger == GPIO_TRIG_EDGE_FALLING) || (trigger == GPIO_TRIG_EDGE_RISING)) {
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NEORV32_GPIO->IRQ_TYPE |= mask; // set = edge
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}
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else {
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NEORV32_GPIO->IRQ_TYPE &= ~mask; // clear = level
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}
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// polarity type
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if ((trigger == GPIO_TRIG_EDGE_RISING) || (trigger == GPIO_TRIG_LEVEL_HIGH)) {
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NEORV32_GPIO->IRQ_POLARITY |= mask; // set = rising edge / high level
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}
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else {
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NEORV32_GPIO->IRQ_POLARITY &= ~mask; // clear = falling edge / low level
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}
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}
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/**********************************************************************//**
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* Enable input pin interrupt(s).
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*
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* @param[in] pin_mask Pin-IRQ enable mask (set to 1 to enable the according pin).
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**************************************************************************/
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void neorv32_gpio_irq_enable(uint32_t pin_mask) {
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NEORV32_GPIO->IRQ_ENABLE |= pin_mask;
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}
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/**********************************************************************//**
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* Disable input pin interrupt(s).
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*
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* @param[in] pin_mask Pin-IRQ enable mask (set to 1 to disable the according pin).
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**************************************************************************/
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void neorv32_gpio_irq_disable(uint32_t pin_mask) {
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NEORV32_GPIO->IRQ_ENABLE &= ~pin_mask;
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}
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/**********************************************************************//**
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* Get currently pending GPIO input interrupts.
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*
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* @param[in] Pending inputs (bit mask; high = pending).
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**************************************************************************/
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uint32_t neorv32_gpio_irq_get(void) {
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return NEORV32_GPIO->IRQ_PENDING;
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}
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/**********************************************************************//**
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* Clear pending GPIO input interrupts via bit mask.
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*
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* @param[in] clr_mask Clear mask (bit high = clear according pending interrupt).
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**************************************************************************/
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void neorv32_gpio_irq_clr(uint32_t clr_mask) {
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NEORV32_GPIO->IRQ_PENDING = ~clr_mask;
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}
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