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updates and clean-ups
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101
README.md
101
README.md
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@ -4,11 +4,6 @@
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[](https://github.com/stnolting/neorv32/blob/master/LICENSE)
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[](https://github.com/stnolting/neorv32/releases)
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[](https://github.com/stnolting/neorv32/issues)
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[](https://github.com/stnolting/neorv32/pulls)
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[](https://github.com/stnolting/neorv32/commits/master)
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## Table of Content
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@ -18,7 +13,7 @@
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* [Performance](#Performance)
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* [Top Entity](#Top-Entity)
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* [**Getting Started**](#Getting-Started)
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* [Contact](#Contact)
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* [Contribute](#Contribute)
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* [Legal](#Legal)
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@ -75,6 +70,7 @@ The processor passes the official `rv32i`, `rv32im`, `rv32imc`, `rv32Zicsr` and
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### To-Do / Wish List
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- Synthesis results for more platforms
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- Port Dhrystone benchmark
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- Implement atomic operations (`A` extension)
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- Implement co-processor for single-precision floating-point operations (`F` extension)
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@ -414,7 +410,7 @@ has been compiled on a 64-bit x86 Ubuntu (Ubuntu on Windows). Download the toolc
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[https://github.com/stnolting/riscv_gcc_prebuilt](https://github.com/stnolting/riscv_gcc_prebuilt)
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### Dowload the Project and Create a Hardware Project
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### Dowload the NEORV32 Project and Create a Hardware Project
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Now its time to get the most recent version the NEORV32 Processor project from GitHub. Clone the NEORV32 repository using
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`git` from the command line (suggested for easy project updates via `git pull`):
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@ -430,18 +426,18 @@ setup instantiates the processor, implements most of the peripherals and the bas
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propagated:
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```vhdl
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entity neorv32_test_setup is
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port (
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-- Global control --
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clk_i : in std_ulogic := '0'; -- global clock, rising edge
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rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
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-- GPIO --
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gpio_o : out std_ulogic_vector(7 downto 0); -- parallel output
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-- UART --
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uart_txd_o : out std_ulogic; -- UART send data
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uart_rxd_i : in std_ulogic := '0' -- UART receive data
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);
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end neorv32_test_setup;
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entity neorv32_test_setup is
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port (
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-- Global control --
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clk_i : in std_ulogic := '0'; -- global clock, rising edge
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rstn_i : in std_ulogic := '0'; -- global reset, low-active, async
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-- GPIO --
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gpio_o : out std_ulogic_vector(7 downto 0); -- parallel output
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-- UART --
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uart_txd_o : out std_ulogic; -- UART send data
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uart_rxd_i : in std_ulogic := '0' -- UART receive data
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);
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end neorv32_test_setup;
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```
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This test setup is intended as quick and easy "hello world" test setup to get into the NEORV32.
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@ -454,10 +450,9 @@ Make sure `GNU Make` and a native `GCC` compiler are installed. To test the inst
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neorv32/sw/example/blink_led$ make check
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The NEORV32 project includes some example programs from which you can start your own application:
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[SW example projects](https://github.com/stnolting/neorv32/tree/master/sw/example)
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Simply compile one of these projects. This will create a NEORV32 executable `neorv32_exe.bin` in the same folder.
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The NEORV32 project includes some [example programs](https://github.com/stnolting/neorv32/tree/master/sw/example) from
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which you can start your own application. Simply compile one of these projects. This will create a NEORV32
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executable `neorv32_exe.bin` in the same folder.
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neorv32/sw/example/blink_led$ make clean_all compile
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@ -471,18 +466,49 @@ uses the following default UART configuration:
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- No transmission / flow control protocol (raw bytes only)
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- Newline on `\r\n` (carriage return & newline)
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Use the bootloader console to upload and execute your application image.
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Use the bootloader console to upload the `neorv32_exe.bin` file and run your application image.
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Going further: Take a look at the [ NEORV32 datasheet](https://raw.githubusercontent.com/stnolting/neorv32/master/docs/NEORV32.pdf).
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```
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<< NEORV32 Bootloader >>
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BLDV: Jul 6 2020
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HWV: 1.0.1.0
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CLK: 0x0134FD90 Hz
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MHID: 0x0001CE40
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MISA: 0x42801104
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CONF: 0x03FF0035
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IMEM: 0x00010000 bytes @ 0x00000000
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DMEM: 0x00010000 bytes @ 0x80000000
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Autoboot in 8s. Press key to abort.
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Aborted.
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Available CMDs:
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h: Help
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r: Restart
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u: Upload
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s: Store to flash
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l: Load from flash
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e: Execute
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CMD:> u
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Awaiting neorv32_exe.bin... OK
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CMD:> e
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Booting...
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Blinking LED demo program
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```
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Going further: Take a look at the _Let's Get It Started!_ chapter of the [ NEORV32 datasheet](https://raw.githubusercontent.com/stnolting/neorv32/master/docs/NEORV32.pdf).
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## Contact
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## Contribute
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If you have any questions, bug reports, ideas or if you are facing problems with the NEORV32 or want to give some kind of feedback, open a
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[new issue](https://github.com/stnolting/neorv32/issues) or directly drop me a line:
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I'm always thankful for help! So if you have any questions, bug reports, ideas or if you want to give some kind of feedback, feel free
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to open a [new issue](https://github.com/stnolting/neorv32/issues).
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stnolting@gmail.com
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If you want to get involved you can also directly drop me a line (mailto:stnolting@gmail.com).
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Please also check out the project's [code of conduct](https://github.com/stnolting/neorv32/tree/master/CODE_OF_CONDUCT.md).
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@ -499,7 +525,7 @@ If you are using the NEORV32 Processor in some kind of publication, please cite
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This is a hobby project released under the BSD 3-Clause license. No copyright infringement intended.
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Other implied/used projects might have different licensing - see their documentation to get more information.
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**BSD 3-Clause License**
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#### BSD 3-Clause License
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Copyright (c) 2020, Stephan Nolting. All rights reserved.
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@ -526,6 +552,19 @@ NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVE
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OF THE POSSIBILITY OF SUCH DAMAGE.
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#### Limitation of Liability for External Links
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Our website contains links to the websites of third parties („external links“). As the
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content of these websites is not under our control, we cannot assume any liability for
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such external content. In all cases, the provider of information of the linked websites
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is liable for the content and accuracy of the information provided. At the point in time
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when the links were placed, no infringements of the law were recognisable to us. As soon
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as an infringement of the law becomes known to us, we will immediately remove the
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link in question.
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#### Propretary Notice
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"Windows" is a trademark of Microsoft Corporation.
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"Artix" and "Vivado" are trademarks of Xilinx Inc.
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@ -537,6 +576,8 @@ OF THE POSSIBILITY OF SUCH DAMAGE.
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"AXI4" and "AXI4-Lite" are trademarks of Arm Holdings plc.
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#### Misc
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[](https://travis-ci.com/stnolting/neorv32)
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Continous integration provided by [Travis CI](https://travis-ci.com/stnolting/neorv32) and powered by [GHDL](https://github.com/ghdl/ghdl).
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