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https://github.com/stnolting/neorv32.git
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[rtl/sw/example/cpu_test] minor edits (now using dedicated PMP configuration functions fro PMP test)
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2c516c04ee
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1 changed files with 10 additions and 29 deletions
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@ -109,9 +109,8 @@ int main() {
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return 0;
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#endif
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register uint32_t tmp_a, tmp_b, tmp_c;
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uint32_t i, j;
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register uint32_t tmp_a, tmp_b;
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int i;
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volatile uint32_t dummy_dst __attribute__((unused));
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union {
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@ -324,12 +323,12 @@ int main() {
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cnt_test++;
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// start timing
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tmp_a = neorv32_cpu_csr_read(CSR_CYCLE);
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neorv32_cpu_csr_write(CSR_MCYCLE, 0);
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// this store access will timeout
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MMR_UNREACHABLE = 0;
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tmp_a = neorv32_cpu_csr_read(CSR_CYCLE) - tmp_a;
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tmp_a = neorv32_cpu_csr_read(CSR_MCYCLE);
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// make sure there was a time-out
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if (neorv32_cpu_csr_read(CSR_MCAUSE) == TRAP_CODE_S_ACCESS) {
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@ -1071,34 +1070,16 @@ int main() {
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neorv32_cpu_csr_write(CSR_MCAUSE, 0);
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cnt_test++;
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// check min granulartiy
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neorv32_cpu_csr_write(CSR_PMPCFG0, 0);
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neorv32_cpu_csr_write(CSR_PMPADDR0, 0xffffffff);
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tmp_a = neorv32_cpu_csr_read(0x3b0);
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// find least-significat set bit
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for (i=31; i!=0; i--) {
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if (((tmp_a >> i) & 1) == 0) {
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break;
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}
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}
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// find out mininmal region size (granulartiy)
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tmp_b = neorv32_cpu_pmp_get_granularity();
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tmp_a = SYSINFO_DSPACE_BASE; // base address of protected region
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neorv32_uart_printf("Creating protected page (NAPOT, [!X,!W,R], %u bytes) @ 0x%x: ", tmp_b, tmp_a);
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tmp_b = 0;
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for (j=i; j!=0; j--) {
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tmp_b = tmp_b << 1;
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tmp_b = tmp_b | 1;
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}
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tmp_c = tmp_a & (~tmp_b); // clear LSBs in base address
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tmp_c = tmp_c | tmp_b; // set region size config
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// configure
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int pmp_return = neorv32_cpu_pmp_configure_region(0, tmp_a, tmp_b, 0b00011001); // NAPOT, read permission, NO write and NO execute permissions
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neorv32_uart_printf("Creating protected page (NAPOT, [!X,!W,R], %u bytes) @ 0x%x (PMPADDR = 0x%x): ", (uint32_t)(1 << (i+1+2)), tmp_a, tmp_c);
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neorv32_cpu_csr_write(CSR_PMPADDR0, tmp_c); // 64k area @ 0xFFFFA000
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neorv32_cpu_csr_write(CSR_PMPCFG0, 0b00011001); // NAPOT, read permission, NO write and NO execute permissions
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if ((neorv32_cpu_csr_read(CSR_PMPADDR0) == tmp_c) && (neorv32_cpu_csr_read(CSR_PMPCFG0) == 0b00011001) && (neorv32_cpu_csr_read(CSR_MCAUSE) == 0)) {
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if ((pmp_return == 0) && (neorv32_cpu_csr_read(CSR_MCAUSE) == 0)) {
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test_ok();
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}
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else {
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