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added custom USER_CODE generic; can be checked by software via SYSINFO

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stnolting 2020-07-20 13:42:10 +02:00
parent 03b1bb1a9e
commit c55e3d18fb
6 changed files with 23 additions and 14 deletions
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12
rtl/core/neorv32_sysinfo.vhd
View file

@ -47,6 +47,7 @@ entity neorv32_sysinfo is
-- General --
CLOCK_FREQUENCY : natural := 0; -- clock frequency of clk_i in Hz
BOOTLOADER_USE : boolean := true; -- implement processor-internal bootloader?
USER_CODE : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom user code
-- Memory configuration: Instruction memory --
MEM_ISPACE_BASE : std_ulogic_vector(31 downto 0) := x"00000000"; -- base address of instruction memory space
MEM_ISPACE_SIZE : natural := 8*1024; -- total size of instruction memory space in byte
@ -114,10 +115,11 @@ begin
-- SYSINFO(0): Processor (primary) clock frequency --
sysinfo_mem(0) <= std_ulogic_vector(to_unsigned(CLOCK_FREQUENCY, 32));
-- SYSINFO(1): reserved --
sysinfo_mem(1) <= (others => '0'); -- reserved - for custom user code?
-- SYSINFO(1): Custom user code --
sysinfo_mem(1) <= USER_CODE;
-- SYSINFO(2): Implemented processor devices/features --
-- Memory
sysinfo_mem(2)(00) <= bool_to_ulogic_f(BOOTLOADER_USE); -- implement processor-internal bootloader?
sysinfo_mem(2)(01) <= bool_to_ulogic_f(MEM_EXT_USE); -- implement external memory bus interface?
sysinfo_mem(2)(02) <= bool_to_ulogic_f(MEM_INT_IMEM_USE); -- implement processor-internal instruction memory?
@ -136,7 +138,7 @@ begin
sysinfo_mem(2)(25) <= bool_to_ulogic_f(IO_DEVNULL_USE); -- implement dummy device (DEVNULL)?
-- SYSINFO(3): reserved --
sysinfo_mem(3) <= (others => '0'); -- reserved - for technology-specific configuration options?
sysinfo_mem(3) <= (others => '0'); -- reserved - maybe for technology-specific configuration options?
-- SYSINFO(4): Base address of instruction memory space --
sysinfo_mem(4) <= MEM_ISPACE_BASE;
@ -144,10 +146,10 @@ begin
-- SYSINFO(5): Base address of data memory space --
sysinfo_mem(5) <= MEM_DSPACE_BASE;
-- SYSINFO(6): Total size of instruction memory space in byte --
-- SYSINFO(6): Total size of instruction memory space in bytes --
sysinfo_mem(6) <= std_ulogic_vector(to_unsigned(MEM_ISPACE_SIZE, 32));
-- SYSINFO(7): Total size of data memory space in byte --
-- SYSINFO(7): Total size of data memory space in bytes --
sysinfo_mem(7) <= std_ulogic_vector(to_unsigned(MEM_DSPACE_SIZE, 32));

14
rtl/core/neorv32_top.vhd
View file

@ -50,6 +50,7 @@ entity neorv32_top is
CLOCK_FREQUENCY : natural := 0; -- clock frequency of clk_i in Hz
BOOTLOADER_USE : boolean := true; -- implement processor-internal bootloader?
CSR_COUNTERS_USE : boolean := true; -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
USER_CODE : std_ulogic_vector(31 downto 0) := x"00000000"; -- custom user code
-- RISC-V CPU Extensions --
CPU_EXTENSION_RISCV_C : boolean := false; -- implement compressed extension?
CPU_EXTENSION_RISCV_E : boolean := false; -- implement embedded RF extension?
@ -235,15 +236,15 @@ begin
end if;
end if;
-- memory system - address space --
-- memory system --
if (MEM_INT_IMEM_USE = true) and (MEM_INT_IMEM_SIZE > MEM_ISPACE_SIZE) then
assert false report "NEORV32 CONFIG ERROR! Internal instruction memory (IMEM) cannot be greater than total instruction address space." severity error;
end if;
if (MEM_INT_DMEM_USE = true) and (MEM_INT_DMEM_SIZE > MEM_DSPACE_SIZE) then
assert false report "NEORV32 CONFIG ERROR! Internal data memory (DMEM) cannot be greater than total data address space." severity error;
end if;
if (MEM_EXT_TIMEOUT <= 1) then
assert false report "NEORV32 CONFIG ERROR! Invalid bus timeout. Internal components require 1 cycle delay." severity error;
if (MEM_EXT_TIMEOUT < 1) then
assert false report "NEORV32 CONFIG ERROR! Invalid bus timeout. Processor-internal components have 1 cycle delay." severity error;
end if;
-- clock --
@ -253,7 +254,7 @@ begin
-- CSR system not implemented --
if (CPU_EXTENSION_RISCV_Zicsr = false) then
assert false report "NEORV32 CONFIG WARNING! No exception/interrupt/machine status features available when CPU_EXTENSION_RISCV_Zicsr = false." severity warning;
assert false report "NEORV32 CONFIG WARNING! No exception/interrupt/machine features available when CPU_EXTENSION_RISCV_Zicsr = false." severity warning;
end if;
-- core local interrupt controller --
if (CPU_EXTENSION_RISCV_Zicsr = false) and (IO_CLIC_USE = true) then
@ -262,10 +263,10 @@ begin
-- memory layout notifier --
if (MEM_ISPACE_BASE /= x"00000000") then
assert false report "NEORV32 CONFIG WARNING! Non-default base address for instruction address space. Make sure this is sync with the linker script." severity warning;
assert false report "NEORV32 CONFIG WARNING! Non-default base address for instruction address space. Make sure this is sync with the software framwork." severity warning;
end if;
if (MEM_DSPACE_BASE /= x"80000000") then
assert false report "NEORV32 CONFIG WARNING! Non-default base address for data address space. Make sure this is sync with the linker script." severity warning;
assert false report "NEORV32 CONFIG WARNING! Non-default base address for data address space. Make sure this is sync with the software framwork." severity warning;
end if;
end if;
end process sanity_check;
@ -929,6 +930,7 @@ begin
-- General --
CLOCK_FREQUENCY => CLOCK_FREQUENCY, -- clock frequency of clk_i in Hz
BOOTLOADER_USE => BOOTLOADER_USE, -- implement processor-internal bootloader?
USER_CODE => USER_CODE, -- custom user code
-- Memory configuration: Instruction memory --
MEM_ISPACE_BASE => MEM_ISPACE_BASE, -- base address of instruction memory space
MEM_ISPACE_SIZE => MEM_ISPACE_SIZE, -- total size of instruction memory space in byte

1
rtl/top_templates/neorv32_test_setup.vhd
View file

@ -72,6 +72,7 @@ begin
CLOCK_FREQUENCY => 100000000, -- clock frequency of clk_i in Hz
BOOTLOADER_USE => true, -- implement processor-internal bootloader?
CSR_COUNTERS_USE => true, -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
USER_CODE => x"00000000", -- custom user code
-- RISC-V CPU Extensions --
CPU_EXTENSION_RISCV_C => false, -- implement compressed extension?
CPU_EXTENSION_RISCV_E => false, -- implement embedded RF extension?

1
sim/neorv32_tb.vhd
View file

@ -129,6 +129,7 @@ begin
CLOCK_FREQUENCY => f_clock_nat_c, -- clock frequency of clk_i in Hz
BOOTLOADER_USE => false, -- implement processor-internal bootloader?
CSR_COUNTERS_USE => true, -- implement RISC-V perf. counters ([m]instret[h], [m]cycle[h], time[h])?
USER_CODE => x"19880704", -- custom user code
-- RISC-V CPU Extensions --
CPU_EXTENSION_RISCV_C => true, -- implement compressed extension?
CPU_EXTENSION_RISCV_E => false, -- implement embedded RF extension?

4
sw/lib/include/neorv32.h
View file

@ -512,8 +512,8 @@ enum NEORV32_TRNG_DUTY_enum {
/**@{*/
/** SYSINFO(0): Clock speed */
#define SYSINFO_CLK (*(IO_ROM32 0xFFFFFFE0UL))
/** SYSINFO(1): reserved */
#define SYSINFO_reserved0 (*(IO_ROM32 0xFFFFFFE4UL))
/** SYSINFO(1): Custom user code (via "USER_CODE" generic) */
#define SYSINFO_USER_CODE (*(IO_ROM32 0xFFFFFFE4UL))
/** SYSINFO(2): Clock speed */
#define SYSINFO_FEATURES (*(IO_ROM32 0xFFFFFFE8UL))
/** SYSINFO(3): reserved */

5
sw/lib/source/neorv32_rte.c
View file

@ -223,7 +223,10 @@ void neorv32_rte_print_hw_config(void) {
neorv32_uart_printf("\n-- Central Processing Unit --\n");
// Hart ID
neorv32_uart_printf("Hart ID: 0x%x\n", neorv32_cpu_csr_read(CSR_MHARTID));
neorv32_uart_printf("Hart ID: %u\n", neorv32_cpu_csr_read(CSR_MHARTID));
// Custom user code
neorv32_uart_printf("User code: 0x%x\n", SYSINFO_USER_CODE);
// HW version
neorv32_uart_printf("Hardware version: ");