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minor edits

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stnolting 2020-10-15 19:29:17 +02:00
parent 05d06d3106
commit ca4b9200f5
2 changed files with 4 additions and 4 deletions
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4
sim/neorv32_tb.vhd
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@ -264,9 +264,9 @@ begin
i := to_integer(unsigned(uart_rx_sreg(8 downto 1)));
if (i < 32) or (i > 32+95) then -- printable char?
report "SIM_UART TX: (" & integer'image(i) & ")"; -- print code
report "NEORV32_TB_UART.TX: (" & integer'image(i) & ")"; -- print code
else
report "SIM_UART TX: " & character'val(i); -- print ASCII
report "NEORV32_TB_UART.TX: " & character'val(i); -- print ASCII
end if;
if (i = 10) then -- Linux line break

4
sw/lib/source/neorv32_rte.c
View file

@ -223,10 +223,10 @@ static void __neorv32_rte_debug_exc_handler(void) {
case TRAP_CODE_FIRQ_1: neorv32_uart_print("Fast interrupt 1"); break;
case TRAP_CODE_FIRQ_2: neorv32_uart_print("Fast interrupt 2"); break;
case TRAP_CODE_FIRQ_3: neorv32_uart_print("Fast interrupt 3"); break;
default: neorv32_uart_print("Unknown "); __neorv32_rte_print_hex_word(trap_cause); break;
default: neorv32_uart_print("Unknown trap cause: "); __neorv32_rte_print_hex_word(trap_cause); break;
}
// address
// instruction address
neorv32_uart_print(" @ ");
__neorv32_rte_print_hex_word(neorv32_cpu_csr_read(CSR_MSCRATCH)); // rte core stores actual mepc to mscratch