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Update neorv32_ProcessorTop_MinimalBoot.vhd
Bootstrap gpios to declared configuration Signed-off-by: olivier henley <olivier.henley@gmail.com>
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cbb84a51b3
1 changed files with 3 additions and 3 deletions
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@ -25,7 +25,7 @@ entity neorv32_ProcessorTop_MinimalBoot is
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MEM_INT_DMEM_EN : boolean := true; -- implement processor-internal data memory
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MEM_INT_DMEM_SIZE : natural := 64*1024; -- size of processor-internal data memory in bytes
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-- Processor peripherals --
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IO_GPIO_NUM : natural := 0; -- number of GPIO input/output pairs (0..64)
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IO_GPIO_NUM : natural := 4; -- number of GPIO input/output pairs (0..64)
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IO_PWM_NUM_CH : natural := 3 -- number of PWM channels to implement (0..16)
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);
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port (
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@ -33,7 +33,7 @@ entity neorv32_ProcessorTop_MinimalBoot is
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clk_i : in std_logic;
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rstn_i : in std_logic;
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-- GPIO (available if IO_GPIO_EN = true) --
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gpio_o : out std_ulogic_vector(3 downto 0);
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gpio_o : out std_ulogic_vector(IO_GPIO_NUM-1 downto 0);
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-- primary UART0 (available if IO_UART0_EN = true) --
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uart_txd_o : out std_ulogic; -- UART0 send data
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uart_rxd_i : in std_ulogic := '0'; -- UART0 receive data
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@ -85,7 +85,7 @@ begin
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);
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-- GPIO --
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gpio_o <= con_gpio_o(3 downto 0);
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gpio_o <= con_gpio_o(IO_GPIO_NUM-1 downto 0);
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-- PWM --
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pwm_o <= con_pwm_o(IO_PWM_NUM_CH-1 downto 0);
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