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[sw/example] update UART setup function

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This commit is contained in:
stnolting 2023-03-05 19:00:24 +01:00
parent 344aeff3b6
commit cd1b6c8878
30 changed files with 102 additions and 131 deletions
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7
sw/example/bus_explorer/main.c
View file

@ -90,11 +90,8 @@ int main() {
// disable all interrupt sources
neorv32_cpu_csr_write(CSR_MIE, 0);
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// intro
neorv32_uart0_printf("\n<<< NEORV32 Bus Explorer >>>\n\n");

4
sw/example/coremark/core_portme.c
View file

@ -151,7 +151,9 @@ portable_init(core_portable *p, int *argc, char *argv[])
/* NEORV32-specific */
neorv32_cpu_csr_write(CSR_MIE, 0); // no interrupt, thanks
neorv32_rte_setup(); // capture all exceptions and give debug information, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// Disable coremark compilation by default

7
sw/example/demo_cfs/main.c
View file

@ -70,14 +70,13 @@ int main() {
uint32_t i, tmp;
// init UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// capture all exceptions and give debug info via UART0
// this is not required, but keeps us safe
neorv32_rte_setup();
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if CFS is implemented at all
if (neorv32_cfs_available() == 0) {

5
sw/example/demo_cfu/main.c
View file

@ -82,12 +82,11 @@ int main() {
uint32_t i, rs1, rs2, rs3, rs4;
// initialize NEORV32 run-time environment
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if UART0 is implemented
if (neorv32_uart0_available() == 0) {

4
sw/example/demo_freeRTOS/main.c
View file

@ -260,8 +260,8 @@ void SystemIrqHandler( uint32_t mcause )
#include <neorv32.h>
int main() {
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
neorv32_uart0_puts("ERROR! FreeRTOS has not been compiled. Use >>make USER_FLAGS+=-DRUN_FREERTOS_DEMO clean_all exe<< to compile it.\n");
return 1;
}

4
sw/example/demo_gptmr/main.c
View file

@ -67,8 +67,8 @@ int main() {
// setup NEORV32 runtime environment (for trap handling)
neorv32_rte_setup();
// setup UART at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if GPTMR unit is implemented at all

6
sw/example/demo_hpm/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -62,8 +62,8 @@ int main() {
// initialize NEORV32 run-time environment
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if UART0 is implemented
if (neorv32_uart0_available() == 0) {

4
sw/example/demo_mtime/main.c
View file

@ -67,8 +67,8 @@ int main() {
// capture all exceptions and give debug info via UART
neorv32_rte_setup();
// init UART at default baud rate, no parity bits, no hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if MTIME unit is implemented at all

7
sw/example/demo_neopixel/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -73,9 +73,8 @@ int main() {
// this is not required, but keeps us safe
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, no hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if NEOLED unit is implemented at all, abort if not

6
sw/example/demo_newlib/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -71,8 +71,8 @@ int main() {
// -> catch all traps and give debug information via UART0
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if UART0 is implemented at all
if (neorv32_uart0_available() == 0) {

8
sw/example/demo_onewire/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -75,12 +75,12 @@ void onewire_firq_handler(void);
**************************************************************************/
int main() {
// setup UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// capture all exceptions and give debug info via UART0
neorv32_rte_setup();
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if ONEWIRE is implemented at all
if (!neorv32_onewire_available()) {
neorv32_uart0_printf("Error! ONEWIRE module not synthesized!\n");

6
sw/example/demo_pmp/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -73,8 +73,8 @@ int main() {
// initialize NEORV32 run-time environment
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if UART0 is implemented
if (neorv32_uart0_available() == 0) {

5
sw/example/demo_pwm/main.c
View file

@ -69,8 +69,9 @@ int main() {
// use UART0 if implemented
if (neorv32_uart0_available()) {
// setup UART at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// say hello
neorv32_uart0_printf("<<< PWM demo program >>>\n");

4
sw/example/demo_sdi/main.c
View file

@ -72,8 +72,8 @@ int main() {
// capture all exceptions and give debug info via UART
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if UART0 unit is implemented at all
if (neorv32_uart0_available() == 0) {

5
sw/example/demo_spi/main.c
View file

@ -75,13 +75,12 @@ int main() {
char buffer[8];
int length = 0;
// capture all exceptions and give debug info via UART
// this is not required, but keeps us safe
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, no hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if UART0 unit is implemented at all

4
sw/example/demo_spi_irq/main.c
View file

@ -86,8 +86,8 @@ int main()
// this is not required, but keeps us safe
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if UART0 unit is implemented at all
if (neorv32_uart0_available() == 0) {

4
sw/example/demo_trigger_module/main.c
View file

@ -65,8 +65,8 @@ int main() {
neorv32_rte_setup();
// setup UART at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// intro
neorv32_uart0_printf("\n<< RISC-V Trigger Module Example >>\n\n");

5
sw/example/demo_trng/main.c
View file

@ -76,9 +76,8 @@ int main(void) {
// this is not required, but keeps us safe
neorv32_rte_setup();
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch

8
sw/example/demo_twi/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -83,14 +83,12 @@ int main() {
return 1;
}
// capture all exceptions and give debug info via UART
// this is not required, but keeps us safe
neorv32_rte_setup();
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch

4
sw/example/demo_wdt/main.c
View file

@ -75,8 +75,8 @@ int main() {
// setup NEORV32 runtime environment for capturing all traps
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, ho HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if WDT is implemented at all
if (neorv32_wdt_available() == 0) {

8
sw/example/demo_xip/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -362,13 +362,13 @@ const uint32_t xip_program[] = {
**************************************************************************/
int main() {
// init UART at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// capture all exceptions and give debug info via UART
// this is not required, but keeps us safe
neorv32_rte_setup();
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if XIP module is implemented at all
if (neorv32_xip_available() == 0) {
neorv32_uart0_printf("Error! XIP module not synthesized!\n");

4
sw/example/demo_xirq/main.c
View file

@ -70,8 +70,8 @@ int main() {
// this will take care of handling all CPU traps (interrupts and exceptions)
neorv32_rte_setup();
// setup UART0 at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check if XIRQ unit is implemented at all
if (neorv32_xirq_available() == 0) {

4
sw/example/dhrystone/dhry_1.c
View file

@ -102,9 +102,9 @@ int main (void)
{ /* ***** NEORV32-SPECIFIC ***** */
neorv32_rte_setup();
neorv32_cpu_csr_write(CSR_MIE, 0); // no interrupt, thanks
neorv32_rte_setup(); // capture all exceptions and give debug information, ho hw flow control
neorv32_uart0_setup(19200, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(19200, 0);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch

5
sw/example/float_corner_test/main.c
View file

@ -112,9 +112,8 @@ int main() {
float_conv_t opb;
// float_conv_t opb;
// init primary UART
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// capture all exceptions and give debug info via UART
neorv32_rte_setup();

7
sw/example/floating_point_test/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -112,9 +112,8 @@ int main() {
float_conv_t res_hw;
float_conv_t res_sw;
// init primary UART
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// capture all exceptions and give debug info via UART
neorv32_rte_setup();

6
sw/example/game_of_life/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -97,8 +97,8 @@ int main(void) {
neorv32_rte_setup();
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch

6
sw/example/hardware_info/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2021, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -70,8 +70,8 @@ int main() {
return 1;
}
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch

4
sw/example/hello_cpp/main.cpp
View file

@ -87,8 +87,8 @@ int main() {
// this is not required, but keeps us safe
neorv32_rte_setup();
// setup UART at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// print project logo via UART
neorv32_rte_print_logo();

6
sw/example/hello_world/main.c
View file

@ -3,7 +3,7 @@
// # ********************************************************************************************* #
// # BSD 3-Clause License #
// # #
// # Copyright (c) 2022, Stephan Nolting. All rights reserved. #
// # Copyright (c) 2023, Stephan Nolting. All rights reserved. #
// # #
// # Redistribution and use in source and binary forms, with or without modification, are #
// # permitted provided that the following conditions are met: #
@ -65,8 +65,8 @@ int main() {
// this is not required, but keeps us safe
neorv32_rte_setup();
// init UART at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UART at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch

76
sw/example/processor_check/main.c
View file

@ -131,8 +131,8 @@ int main() {
// disable machine-mode interrupts
neorv32_cpu_csr_clr(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE);
// setup UARTs at default baud rate, no parity bits, no HW flow control
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// setup UARTs at default baud rate, no interrupts
neorv32_uart0_setup(BAUD_RATE, 0);
NEORV32_UART1->CTRL = NEORV32_UART0->CTRL; // copy configuration to initialize UART1
#ifdef SUPPRESS_OPTIONAL_UART_PRINT
@ -971,28 +971,23 @@ int main() {
PRINT_STANDARD("[%i] FIRQ2 (UART0.RX) ", cnt_test);
cnt_test++;
// wait for UART0 to finish transmitting
// wait for UART to finish transmitting
while(neorv32_uart0_tx_busy());
// backup current UART0 configuration
// backup current UART configuration
tmp_a = NEORV32_UART0->CTRL;
// make sure UART is enabled
NEORV32_UART0->CTRL |= (1 << UART_CTRL_EN);
// enable IRQ if RX FIFO not empty
neorv32_uart0_setup(BAUD_RATE, 1 << UART_CTRL_IRQ_RX_NEMPTY);
// make sure sim mode is disabled
NEORV32_UART0->CTRL &= ~(1 << UART_CTRL_SIM_MODE);
// enable fast interrupt
neorv32_cpu_irq_enable(UART0_RX_FIRQ_ENABLE);
// trigger UART0 RX IRQ
neorv32_uart0_putc(0);
// wait for UART0 to finish transmitting
while(neorv32_uart0_tx_busy());
// wait some time for the IRQ to arrive the CPU
asm volatile ("nop");
asm volatile ("nop");
// sleep until interrupt
neorv32_cpu_sleep();
neorv32_cpu_csr_write(CSR_MIE, 0);
@ -1014,28 +1009,23 @@ int main() {
PRINT_STANDARD("[%i] FIRQ3 (UART0.TX) ", cnt_test);
cnt_test++;
// wait for UART0 to finish transmitting
// wait for UART to finish transmitting
while(neorv32_uart0_tx_busy());
// backup current UART0 configuration
// backup current UART configuration
tmp_a = NEORV32_UART0->CTRL;
// make sure UART is enabled
NEORV32_UART0->CTRL |= (1 << UART_CTRL_EN);
// enable IRQ if TX FIFO empty
neorv32_uart0_setup(BAUD_RATE, 1 << UART_CTRL_IRQ_TX_EMPTY);
// make sure sim mode is disabled
NEORV32_UART0->CTRL &= ~(1 << UART_CTRL_SIM_MODE);
neorv32_uart0_putc(0);
// UART0 TX interrupt enable
neorv32_cpu_irq_enable(UART0_TX_FIRQ_ENABLE);
// trigger UART0 TX IRQ
neorv32_uart0_putc(0);
// wait for UART to finish transmitting
while(neorv32_uart0_tx_busy());
// wait some time for the IRQ to arrive the CPU
asm volatile ("nop");
asm volatile ("nop");
// sleep until interrupt
neorv32_cpu_sleep();
neorv32_cpu_csr_write(CSR_MIE, 0);
@ -1059,23 +1049,18 @@ int main() {
// backup current UART1 configuration
tmp_a = NEORV32_UART1->CTRL;
// make sure UART is enabled
NEORV32_UART1->CTRL |= (1 << UART_CTRL_EN);
// enable IRQ if RX FIFO not empty
neorv32_uart1_setup(BAUD_RATE, 1 << UART_CTRL_IRQ_RX_NEMPTY);
// make sure sim mode is disabled
NEORV32_UART1->CTRL &= ~(1 << UART_CTRL_SIM_MODE);
// UART1 RX interrupt enable
neorv32_cpu_irq_enable(UART1_RX_FIRQ_ENABLE);
// trigger UART1 RX IRQ
neorv32_uart1_putc(0);
// wait for UART1 to finish transmitting
while(neorv32_uart1_tx_busy());
// wait some time for the IRQ to arrive the CPU
asm volatile ("nop");
asm volatile ("nop");
// sleep until interrupt
neorv32_cpu_sleep();
neorv32_cpu_csr_write(CSR_MIE, 0);
@ -1099,23 +1084,18 @@ int main() {
// backup current UART1 configuration
tmp_a = NEORV32_UART1->CTRL;
// make sure UART is enabled
NEORV32_UART1->CTRL |= (1 << UART_CTRL_EN);
// enable IRQ if TX FIFO empty
neorv32_uart1_setup(BAUD_RATE, 1 << UART_CTRL_IRQ_TX_EMPTY);
// make sure sim mode is disabled
NEORV32_UART1->CTRL &= ~(1 << UART_CTRL_SIM_MODE);
// UART1 RX interrupt enable
neorv32_uart1_putc(0);
// UART0 TX interrupt enable
neorv32_cpu_irq_enable(UART1_TX_FIRQ_ENABLE);
// trigger UART1 TX IRQ
neorv32_uart1_putc(0);
// wait for UART1 to finish transmitting
while(neorv32_uart1_tx_busy());
// wait some time for the IRQ to arrive the CPU
asm volatile ("nop");
asm volatile ("nop");
// sleep until interrupt
neorv32_cpu_sleep();
neorv32_cpu_csr_write(CSR_MIE, 0);
@ -1423,7 +1403,7 @@ int main() {
// ----------------------------------------------------------
// Test unallowed WFI ("sleep") instruction (executed in user mode)
// Test un-allowed WFI ("sleep") instruction (executed in user mode)
// ----------------------------------------------------------
neorv32_cpu_csr_write(CSR_MCAUSE, mcause_never_c);
PRINT_STANDARD("[%i] WFI (not allowed in u-mode) ", cnt_test);