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[sw] add twd demo
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98
sw/example/demo_twd/main.c
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98
sw/example/demo_twd/main.c
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// ================================================================================ //
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// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
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// Copyright (c) NEORV32 contributors. //
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// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
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// Licensed under the BSD-3-Clause license, see LICENSE for details. //
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// SPDX-License-Identifier: BSD-3-Clause //
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// ================================================================================ //
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/**********************************************************************//**
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* @file demo_twd/main.c
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* @author Lukas Pajak
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* @brief TWD demo.
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**************************************************************************/
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#include <neorv32.h>
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#include <string.h>
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/**********************************************************************//**
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* @name User configuration
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**************************************************************************/
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/**@{*/
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/** UART BAUD rate */
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#define BAUD_RATE 19200
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/** TWD id */
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#define TWD_DEVICE_ID 0x3f
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/**@}*/
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// Prototypes
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void isr_twd(void);
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/**********************************************************************//**
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* This program provides a simple demo as TWD device.
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* A connected TWI Host is required.
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*
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* @note This program requires the UART to be synthesized.
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*
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**************************************************************************/
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int main() {
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// capture all exceptions and give debug info via UART
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// also handles isr for TD
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neorv32_rte_setup();
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// check if UART unit is implemented at all
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if (neorv32_uart0_available() == 0) {
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return 1;
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}
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// setup UART at default baud rate, no interrupts
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neorv32_uart0_setup(BAUD_RATE, 0);
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neorv32_uart0_printf("\n\n<< TWD status demo >>\n");
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neorv32_uart0_printf(__DATE__ "\n");
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neorv32_uart0_printf(__TIME__ "\n");
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uint8_t status = 0x03;
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// check for TWD
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if (!neorv32_twd_available()) {
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neorv32_uart0_printf("TWD not available\n");
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return 1;
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} else {
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neorv32_uart0_printf("TWD available with rx fifo depth of %i and tx fifo depth of %i\n",
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neorv32_twd_get_rx_fifo_depth(), neorv32_twd_get_tx_fifo_depth());
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}
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// setup TWD
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neorv32_rte_handler_install(TWD_RTE_ID, isr_twd);
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neorv32_twd_set_dummy(status);
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neorv32_twd_setup(TWD_DEVICE_ID, 0, 1, 0, 0, 1);
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neorv32_cpu_csr_set(CSR_MIE,
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1 << TWD_FIRQ_ENABLE);
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neorv32_cpu_csr_set(CSR_MSTATUS,
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1 << CSR_MSTATUS_MIE);
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// Fill TX Fifo
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for (uint8_t i = 0; i < neorv32_twd_get_tx_fifo_depth(); i++)
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{
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neorv32_twd_put(i);
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}
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neorv32_uart0_printf("Listen now on %x\n", TWD_DEVICE_ID);
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neorv32_uart0_printf("Read should return %i data byte(s) once and %x when TX FIFO is empty.\n", neorv32_twd_get_tx_fifo_depth(), status);
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while (1) {}
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}
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/***
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* ISR of TWD for read access
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*/
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void isr_twd(void) {
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uint8_t data = neorv32_twd_get();
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neorv32_uart0_printf("Got %x\n", data);
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neorv32_twd_disable_dummy();
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neorv32_uart0_printf("Read should fail (or return 0xFF when in the same transaction) when TX FIFO is empty.\n");
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neorv32_twd_put(data);
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}
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33
sw/example/demo_twd/makefile
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sw/example/demo_twd/makefile
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# Application makefile.
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# Use this makefile to configure all relevant CPU / compiler options.
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# Override the default CPU ISA
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MARCH = rv32i_zicsr_zifencei
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# Override the default RISC-V GCC prefix
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#RISCV_PREFIX ?= riscv-none-elf-
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# Override default optimization goal
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EFFORT = -Os
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# Add extended debug symbols
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USER_FLAGS += -ggdb -gdwarf-3
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# Adjust processor IMEM size
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USER_FLAGS += -Wl,--defsym,__neorv32_rom_size=16k
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# Adjust processor DMEM size
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USER_FLAGS += -Wl,--defsym,__neorv32_ram_size=8k
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# Adjust maximum heap size
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#USER_FLAGS += -Wl,--defsym,__neorv32_heap_size=1k
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# Additional sources
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#APP_SRC += $(wildcard ./*.c)
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#APP_INC += -I .
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# Set path to NEORV32 root directory
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NEORV32_HOME ?= ../../..
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# Include the main NEORV32 makefile
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include $(NEORV32_HOME)/sw/common/common.mk
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