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removed hw_analysis and exception_test projects; they are replaced by the cpu_test project
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stnolting
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2 changed files with 901 additions and 0 deletions
579
sw/example/cpu_test/main.c
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579
sw/example/cpu_test/main.c
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// #################################################################################################
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// # << NEORV32 - CPU Test Program >> #
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// # ********************************************************************************************* #
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// # BSD 3-Clause License #
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// # #
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// # Copyright (c) 2020, Stephan Nolting. All rights reserved. #
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// # #
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// # Redistribution and use in source and binary forms, with or without modification, are #
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// # permitted provided that the following conditions are met: #
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// # #
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// # 1. Redistributions of source code must retain the above copyright notice, this list of #
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// # conditions and the following disclaimer. #
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// # #
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// # 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
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// # conditions and the following disclaimer in the documentation and/or other materials #
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// # provided with the distribution. #
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// # #
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// # 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
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// # endorse or promote products derived from this software without specific prior written #
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// # permission. #
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// # #
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// # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
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// # OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
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// # MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
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// # COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
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// # EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
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// # GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
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// # AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
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// # NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
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// # OF THE POSSIBILITY OF SUCH DAMAGE. #
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// # ********************************************************************************************* #
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// # The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
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// #################################################################################################
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/**********************************************************************//**
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* @file cpu_test/main.c
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* @author Stephan Nolting
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* @brief Simple CPU interrupts and exceptions test program.
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**************************************************************************/
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#include <neorv32.h>
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/**********************************************************************//**
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* @name User configuration
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**************************************************************************/
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/**@{*/
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/** UART BAUD rate */
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#define BAUD_RATE 19200
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//** Set 1 for detailed exception debug information */
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#define DETAILED_EXCEPTION_DEBUG 0
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//** Reachable unaligned address */
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#define ADDR_UNALIGNED 0x00000001
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//** Unreachable aligned address */
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#define ADDR_UNREACHABLE 0xFFFFFF00
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/**@}*/
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/**********************************************************************//**
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* @name Exception handler acknowledges
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**************************************************************************/
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/**@{*/
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/** Exception handler answers / identifiers */
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enum EXC_HANDLER_ANSWERS {
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ANSWER_I_MISALIGN = 0x12345678, /**< Answer for misaligned instruction address excetion */
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ANSWER_I_ACCESS = 0xAABB1133, /**< Answer for instruction access fault excetion */
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ANSWER_I_ILLEGAL = 0x0199203B, /**< Answer for illegal instruction excetion */
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ANSWER_BREAKPOINT = 0x12322330, /**< Answer for breakpoint excetion */
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ANSWER_L_MISALIGN = 0xBABCCCCC, /**< Answer for misaligned load address excetion */
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ANSWER_L_ACCESS = 0xDEF728AA, /**< Answer for load access fault excetion */
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ANSWER_S_MISALIGN = 0xFF0927DD, /**< Answer for misaligned store address excetion */
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ANSWER_S_ACCESS = 0x20091777, /**< Answer for store access fault excetion */
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ANSWER_ENVCALL = 0x55662244, /**< Answer for environment call excetion */
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ANSWER_MSI = 0xCDECDEA9, /**< Answer for machine software interrupt */
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ANSWER_MTI = 0x0012FA53, /**< Answer for machine timer interrupt */
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ANSWER_CLIC = 0xEEF33088 /**< Answer for machine external interrupt */
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};
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/** Gloabl volatile variable to store exception handler answer */
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volatile uint32_t exception_handler_answer;
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/**@}*/
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// Prototypes
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void exc_handler_i_misalign(void);
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void exc_handler_i_access(void);
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void exc_handler_i_illegal(void);
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void exc_handler_breakpoint(void);
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void exc_handler_l_misalign(void);
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void exc_handler_l_access(void);
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void exc_handler_s_misalign(void);
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void exc_handler_s_access(void);
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void exc_handler_envcall(void);
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void exc_handler_msi(void);
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void exc_handler_mti(void);
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void irq_handler_clic_ch0();
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/**********************************************************************//**
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* Unreachable memory-mapped register that should be always available
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**************************************************************************/
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#define MMR_UNREACHABLE (*(IO_REG32 (ADDR_UNREACHABLE)))
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/**********************************************************************//**
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* This program uses mostly synthetic case to trigger all implemented exceptions.
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* Each exception is captured and evaluated for correct detection.
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*
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* @note This program requires the UART, MTIME and CLIC to be synthesized.
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*
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* @return Irrelevant.
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**************************************************************************/
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int main() {
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register uint32_t tmp_a;
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volatile uint32_t dummy_dst __attribute__((unused));
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int cnt_fail = 0;
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int cnt_ok = 0;
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int cnt_test = 0;
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// check if UART unit is implemented at all
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if (neorv32_uart_available() == 0) {
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return 0;
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}
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// check if CLIC unit is implemented at all
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if (neorv32_clic_available() == 0) {
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return 0;
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}
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// check if MTIME unit is implemented at all
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if (neorv32_mtime_available() == 0) {
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return 0;
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}
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// init UART at default baud rate, no rx interrupt, no tx interrupt
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neorv32_uart_setup(BAUD_RATE, 0, 0);
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// set CMP of machine system timer MTIME to max to prevent an IRQ
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uint64_t mtime_cmp_max = 0xFFFFFFFFFFFFFFFFL;
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neorv32_mtime_set_timecmp(mtime_cmp_max);
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// intro
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neorv32_uart_printf("\n\n------ CPU TEST ------n\n");
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// show full HW config report
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neorv32_rte_print_hw_config();
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// intro2
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neorv32_uart_printf("\n\nNEORV32 exceptions and interrupts test program\n\n");
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// install exception handler functions
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int install_err = 0;
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install_err += neorv32_rte_exception_install(EXCID_I_MISALIGNED, exc_handler_i_misalign);
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install_err += neorv32_rte_exception_install(EXCID_I_ACCESS, exc_handler_i_access);
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install_err += neorv32_rte_exception_install(EXCID_I_ILLEGAL, exc_handler_i_illegal);
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install_err += neorv32_rte_exception_install(EXCID_BREAKPOINT, exc_handler_breakpoint);
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install_err += neorv32_rte_exception_install(EXCID_L_MISALIGNED, exc_handler_l_misalign);
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install_err += neorv32_rte_exception_install(EXCID_L_ACCESS, exc_handler_l_access);
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install_err += neorv32_rte_exception_install(EXCID_S_MISALIGNED, exc_handler_s_misalign);
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install_err += neorv32_rte_exception_install(EXCID_S_ACCESS, exc_handler_s_access);
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install_err += neorv32_rte_exception_install(EXCID_MENV_CALL, exc_handler_envcall);
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install_err += neorv32_rte_exception_install(EXCID_MSI, exc_handler_msi);
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install_err += neorv32_rte_exception_install(EXCID_MTI, exc_handler_mti);
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//install_err += neorv32_rte_exception_install(EXCID_MEI, -); done by neorv32_clic_handler_install
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if (install_err) {
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neorv32_uart_printf("install error!\n");
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return 0;
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}
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// install interrupt handler for clic WDT channel
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install_err += neorv32_clic_handler_install(CLIC_CH_WDT, irq_handler_clic_ch0);
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if (install_err) {
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neorv32_uart_printf("CLIC install error!\n");
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return 0;
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}
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#if (DETAILED_EXCEPTION_DEBUG==1)
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// enable debug mode for uninitialized exception/interrupt vectors
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// and overwrite previous exception handler installations
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// -> any exception/interrupt will show a message from the neorv32 runtime environment
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neorv32_rte_enable_debug_mode();
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#endif
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// enable global interrupts
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neorv32_cpu_eint();
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exception_handler_answer = 0;
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// ----------------------------------------------------------
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// Unaligned instruction address
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// ----------------------------------------------------------
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neorv32_uart_printf("EXC I_ALIGN: ");
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cnt_test++;
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// call unaligned address
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((void (*)(void))ADDR_UNALIGNED)();
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_I_MISALIGN) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Instruction access fault
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// ----------------------------------------------------------
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neorv32_uart_printf("EXC I_ACC: ");
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cnt_test++;
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// call unreachable aligned address
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((void (*)(void))ADDR_UNREACHABLE)();
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_I_ACCESS) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Illegal instruction
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// ----------------------------------------------------------
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neorv32_uart_printf("EXC I_ILLEG: ");
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cnt_test++;
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// create test program in RAM
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static const uint32_t dummy_sub_program[2] = {
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0xDEAD007F, // undefined 32-bit opcode -> illegal instruction exception
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0x00008067 // ret (32-bit)
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};
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tmp_a = (uint32_t)&dummy_sub_program; // call the dummy sub program
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asm volatile ( "jalr ra, %0 " : "=r" (tmp_a) : "r" (tmp_a));
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_I_ILLEGAL) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Breakpoint instruction
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// ----------------------------------------------------------
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neorv32_uart_printf("EXC BREAK: ");
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cnt_test++;
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asm volatile("EBREAK");
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_BREAKPOINT) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Unaligned load address
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// ----------------------------------------------------------
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neorv32_uart_printf("EXC L_ALIGN: ");
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cnt_test++;
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// load from unaligned address
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asm volatile ("lh zero, %[input_i](zero)" : : [input_i] "i" (ADDR_UNALIGNED));
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_L_MISALIGN) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Load access fault
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// ----------------------------------------------------------
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neorv32_uart_printf("EXC L_ACC: ");
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cnt_test++;
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// load from unreachable aligned address
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dummy_dst = MMR_UNREACHABLE;
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_L_ACCESS) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Unaligned store address
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// ----------------------------------------------------------
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neorv32_uart_printf("EXC S_ALIGN: ");
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cnt_test++;
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// store to unaligned address
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asm volatile ("sh zero, %[input_i](zero)" : : [input_i] "i" (ADDR_UNALIGNED));
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_S_MISALIGN) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Store access fault
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// ----------------------------------------------------------
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neorv32_uart_printf("EXC S_ACC: ");
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cnt_test++;
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// store to unreachable aligned address
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MMR_UNREACHABLE = 0;
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_S_ACCESS) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Environment call
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// ----------------------------------------------------------
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neorv32_uart_printf("EXC ENVCALL: ");
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cnt_test++;
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asm volatile("ECALL");
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_ENVCALL) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Machine software interrupt
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// ----------------------------------------------------------
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neorv32_uart_printf("IRQ MSI: ");
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cnt_test++;
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// trigger machine software interrupt
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neorv32_cpu_sw_irq();
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_MSI) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Machine timer interrupt (MTIME)
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// ----------------------------------------------------------
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neorv32_uart_printf("IRQ MTI: ");
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cnt_test++;
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// force MTIME IRQ
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neorv32_mtime_set_timecmp(0);
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// wait some time for the IRQ to arrive the CPU
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asm volatile("nop");
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asm volatile("nop");
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asm volatile("nop");
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asm volatile("nop");
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_MTI) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// ----------------------------------------------------------
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// Machine external interrupt (via CLIC)
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// ----------------------------------------------------------
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neorv32_uart_printf("IRQ MEI: ");
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cnt_test++;
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// manually trigger CLIC channel (watchdog interrupt)
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neorv32_clic_trigger_irq(CLIC_CH_WDT);
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// wait some time for the IRQ to arrive the CPU
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asm volatile("nop");
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asm volatile("nop");
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asm volatile("nop");
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asm volatile("nop");
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#if (DETAILED_EXCEPTION_DEBUG==0)
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if (exception_handler_answer == ANSWER_CLIC) {
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neorv32_uart_printf("ok\n");
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cnt_ok++;
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}
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else {
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neorv32_uart_printf("fail\n");
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cnt_fail++;
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}
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exception_handler_answer = 0;
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#endif
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// error report
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neorv32_uart_printf("\n\nTests: %i\nOK: %i\nFAIL: %i\n\n", cnt_test, cnt_ok, cnt_fail);
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|
||||
// final result
|
||||
if (cnt_fail == 0) {
|
||||
neorv32_uart_printf("TEST OK!\n");
|
||||
}
|
||||
else {
|
||||
neorv32_uart_printf("TEST FAILED!\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/**********************************************************************//**
|
||||
* Misaligned instruction address exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_i_misalign(void) {
|
||||
exception_handler_answer = ANSWER_I_MISALIGN;
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* Instruction access fault exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_i_access(void) {
|
||||
exception_handler_answer = ANSWER_I_ACCESS;
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* Illegal instruction exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_i_illegal(void) {
|
||||
exception_handler_answer = ANSWER_I_ILLEGAL;
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* Breakpoint exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_breakpoint(void) {
|
||||
exception_handler_answer = ANSWER_BREAKPOINT;
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* Misaligned load address exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_l_misalign(void) {
|
||||
exception_handler_answer = ANSWER_L_MISALIGN;
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* Load instruction access fault exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_l_access(void) {
|
||||
exception_handler_answer = ANSWER_L_ACCESS;
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* Misaligned store address exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_s_misalign(void) {
|
||||
exception_handler_answer = ANSWER_S_MISALIGN;
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* Store address access fault exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_s_access(void) {
|
||||
exception_handler_answer = ANSWER_S_ACCESS;
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* Environment call exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_envcall(void) {
|
||||
exception_handler_answer = ANSWER_ENVCALL;
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* Machine software interrupt exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_msi(void) {
|
||||
exception_handler_answer = ANSWER_MSI;
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* Machine timer interrupt exception handler.
|
||||
**************************************************************************/
|
||||
void exc_handler_mti(void) {
|
||||
exception_handler_answer = ANSWER_MTI;
|
||||
// set CMP of machine system timer MTIME to max to prevent an IRQ
|
||||
neorv32_mtime_set_timecmp(-1);
|
||||
}
|
||||
|
||||
/**********************************************************************//**
|
||||
* CLIC interrupt handler for channel 0.
|
||||
**************************************************************************/
|
||||
void irq_handler_clic_ch0(void) {
|
||||
exception_handler_answer = ANSWER_CLIC;
|
||||
}
|
||||
|
||||
322
sw/example/cpu_test/makefile
Normal file
322
sw/example/cpu_test/makefile
Normal file
|
|
@ -0,0 +1,322 @@
|
|||
#################################################################################################
|
||||
# << NEORV32 - Application Makefile >> #
|
||||
# ********************************************************************************************* #
|
||||
# Make sure to add the riscv GCC compiler's bin folder to your PATH environment variable. #
|
||||
# ********************************************************************************************* #
|
||||
# BSD 3-Clause License #
|
||||
# #
|
||||
# Copyright (c) 2020, Stephan Nolting. All rights reserved. #
|
||||
# #
|
||||
# Redistribution and use in source and binary forms, with or without modification, are #
|
||||
# permitted provided that the following conditions are met: #
|
||||
# #
|
||||
# 1. Redistributions of source code must retain the above copyright notice, this list of #
|
||||
# conditions and the following disclaimer. #
|
||||
# #
|
||||
# 2. Redistributions in binary form must reproduce the above copyright notice, this list of #
|
||||
# conditions and the following disclaimer in the documentation and/or other materials #
|
||||
# provided with the distribution. #
|
||||
# #
|
||||
# 3. Neither the name of the copyright holder nor the names of its contributors may be used to #
|
||||
# endorse or promote products derived from this software without specific prior written #
|
||||
# permission. #
|
||||
# #
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS #
|
||||
# OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF #
|
||||
# MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE #
|
||||
# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, #
|
||||
# EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE #
|
||||
# GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED #
|
||||
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING #
|
||||
# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED #
|
||||
# OF THE POSSIBILITY OF SUCH DAMAGE. #
|
||||
# ********************************************************************************************* #
|
||||
# The NEORV32 Processor - https://github.com/stnolting/neorv32 (c) Stephan Nolting #
|
||||
#################################################################################################
|
||||
|
||||
|
||||
# *****************************************************************************
|
||||
# USER CONFIGURATION
|
||||
# *****************************************************************************
|
||||
# Compiler effort
|
||||
EFFORT = -Os
|
||||
|
||||
# User's application sources (add additional files here)
|
||||
APP_SRC = $(wildcard *.c)
|
||||
|
||||
# User's application include folders (don't forget the '-I' before each entry)
|
||||
APP_INC = -I .
|
||||
|
||||
# Compiler toolchain (use default if not set by user)
|
||||
RISCV_TOOLCHAIN ?= riscv32-unknown-elf
|
||||
|
||||
# CPU architecture and ABI
|
||||
MARCH = -march=rv32i
|
||||
MABI = -mabi=ilp32
|
||||
|
||||
# Path to runtime c library (use default if not set by user)
|
||||
LIBC_PATH ?= $(dir $(shell which $(CC)))../$(RISCV_TOOLCHAIN)/lib/libc.a
|
||||
LIBGCC_PATH ?= $(dir $(shell which $(CC)))../lib/gcc/$(RISCV_TOOLCHAIN)/*/libgcc.a
|
||||
|
||||
# Relative or absolute path to the NEORV32 home folder (use default if not set by user)
|
||||
NEORV32_HOME ?= ../../..
|
||||
# *****************************************************************************
|
||||
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# NEORV32 framework
|
||||
# -----------------------------------------------------------------------------
|
||||
# Path to NEORV32 linker script and startup file
|
||||
NEORV32_COM_PATH=$(NEORV32_HOME)/sw/common
|
||||
# Path to main NEORV32 library include files
|
||||
NEORV32_INC_PATH=$(NEORV32_HOME)/sw/lib/include
|
||||
# Path to main NEORV32 library source files
|
||||
NEORV32_SRC_PATH=$(NEORV32_HOME)/sw/lib/source
|
||||
# Path to NEORV32 executable generator
|
||||
NEORV32_EXG_PATH=$(NEORV32_HOME)/sw/image_gen
|
||||
# Path to NEORV32 core rtl folder
|
||||
NEORV32_RTL_PATH=$(NEORV32_HOME)/rtl/core
|
||||
# Marker file to verify NEORV32 home folder
|
||||
NEORV32_HOME_MARKER=$(NEORV32_INC_PATH)/neorv32.h
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Add NEORV32 sources to input SRCs
|
||||
# -----------------------------------------------------------------------------
|
||||
APP_SRC += $(wildcard $(NEORV32_SRC_PATH)/*.c)
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Make defaults
|
||||
# -----------------------------------------------------------------------------
|
||||
.SUFFIXES:
|
||||
.PHONY: all
|
||||
.DEFAULT_GOAL := help
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Application output definitions
|
||||
# -----------------------------------------------------------------------------
|
||||
APP_EXE = neorv32_exe.bin
|
||||
APP_ASM = main.s
|
||||
|
||||
compile: $(APP_ASM) $(APP_EXE)
|
||||
install: $(APP_ASM) neorv32_application_image.vhd
|
||||
all: $(APP_ASM) $(APP_EXE) neorv32_application_image.vhd
|
||||
|
||||
# define all object files
|
||||
OBJ = $(APP_SRC:.c=.o)
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Tools and flags
|
||||
# -----------------------------------------------------------------------------
|
||||
# compiler tools
|
||||
CC = $(RISCV_TOOLCHAIN)-gcc
|
||||
LD = $(RISCV_TOOLCHAIN)-ld
|
||||
OBJDUMP = $(RISCV_TOOLCHAIN)-objdump
|
||||
OBJCOPY = $(RISCV_TOOLCHAIN)-objcopy
|
||||
SIZE = $(RISCV_TOOLCHAIN)-size
|
||||
|
||||
# NEORV32 executable image generator
|
||||
IMAGE_GEN = $(NEORV32_EXG_PATH)/image_gen
|
||||
|
||||
# Compiler flags
|
||||
CC_OPTS = $(MARCH) $(MABI) $(EFFORT) -Wall -ffunction-sections -fdata-sections -lm
|
||||
|
||||
# Linker flags
|
||||
LD_OPTS = $(EFFORT) --gc-sections
|
||||
|
||||
# User flags for additional config
|
||||
USER_FLAGS =
|
||||
CC_OPTS += $(USER_FLAGS)
|
||||
|
||||
# Use embedded RISC-V CPU extension?
|
||||
ifeq (,$(findstring rv32e,$(MARCH)))
|
||||
CC_OPTS +=
|
||||
else
|
||||
CC_OPTS += -D__RISCV_EMBEDDED_CPU__
|
||||
endif
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Host native compiler
|
||||
# -----------------------------------------------------------------------------
|
||||
CC_X86 = gcc -Wall -O -g
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Tool targets
|
||||
# -----------------------------------------------------------------------------
|
||||
# install/compile tools
|
||||
$(IMAGE_GEN): $(NEORV32_EXG_PATH)/image_gen.cpp
|
||||
@echo Compiling $(IMAGE_GEN)
|
||||
@$(CC_X86) $< -o $(IMAGE_GEN)
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Application targets: Assemble, compile, link, dump
|
||||
# -----------------------------------------------------------------------------
|
||||
# Assemble startup code
|
||||
crt0.elf: $(NEORV32_COM_PATH)/crt0.S
|
||||
@$(CC) $(CC_OPTS) -c $< -o $@
|
||||
|
||||
# Compile app sources
|
||||
$(OBJ): %.o : %.c crt0.elf
|
||||
@$(CC) -c $(CC_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) $< -o $@
|
||||
|
||||
# Link object files and show memory utilization
|
||||
main.elf: $(OBJ)
|
||||
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o $@
|
||||
@echo "Memory utilization:"
|
||||
@$(SIZE) main.elf
|
||||
|
||||
# Assembly listing file (for debugging)
|
||||
$(APP_ASM): main.elf
|
||||
@$(OBJDUMP) -D -S -z $< > $@
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Application targets: Generate binary executable, install (as VHDL file)
|
||||
# -----------------------------------------------------------------------------
|
||||
# Generate final executable: text, rodata, data (in THIS order!)
|
||||
main.bin: main.elf
|
||||
@$(OBJCOPY) -I elf32-little $< -j .text -O binary text.bin
|
||||
@$(OBJCOPY) -I elf32-little $< -j .rodata -O binary rodata.bin
|
||||
@$(OBJCOPY) -I elf32-little $< -j .data -O binary data.bin
|
||||
@cat text.bin rodata.bin data.bin > $@
|
||||
@rm -f text.bin rodata.bin data.bin
|
||||
|
||||
# Generate NEORV32 executable image for bootloader update
|
||||
$(APP_EXE): main.bin $(IMAGE_GEN)
|
||||
@set -e
|
||||
@$(IMAGE_GEN) -app_bin $< $@ $(shell basename $(CURDIR))
|
||||
@echo "Executable ($(APP_EXE)) size in bytes:"
|
||||
@wc -c < $(APP_EXE)
|
||||
|
||||
# Generate NEORV32 executable VHDL boot image
|
||||
neorv32_application_image.vhd: main.bin $(IMAGE_GEN)
|
||||
@set -e
|
||||
@$(IMAGE_GEN) -app_img $< $@ $(shell basename $(CURDIR))
|
||||
@echo "Installing application image to $(NEORV32_RTL_PATH)/neorv32_application_image.vhd"
|
||||
@cp neorv32_application_image.vhd $(NEORV32_RTL_PATH)/.
|
||||
@rm -f neorv32_application_image.vhd
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Bootloader targets
|
||||
# -----------------------------------------------------------------------------
|
||||
# Assemble startup code
|
||||
bootloader_crt0.elf: $(NEORV32_COM_PATH)/bootloader_crt0.S
|
||||
@$(CC) $(CC_OPTS) -c $< -o $@
|
||||
|
||||
# Compile and install bootloader
|
||||
bootloader: bootloader_crt0.elf $(OBJ) $(IMAGE_GEN)
|
||||
@set -e
|
||||
@$(LD) $(LD_OPTS) -I $(NEORV32_INC_PATH) $(APP_INC) -T $(NEORV32_COM_PATH)/bootloader_neorv32.ld $(OBJ) $(LIBC_PATH) $(LIBGCC_PATH) -o bootloader.elf
|
||||
@echo "Memory utilization:"
|
||||
@$(SIZE) bootloader.elf
|
||||
@$(OBJDUMP) -D -S -z bootloader.elf > bootloader.s
|
||||
@$(OBJCOPY) -I elf32-little bootloader.elf -j .text -O binary text.bin
|
||||
@$(OBJCOPY) -I elf32-little bootloader.elf -j .rodata -O binary rodata.bin
|
||||
@$(OBJCOPY) -I elf32-little bootloader.elf -j .data -O binary data.bin
|
||||
@cat text.bin rodata.bin data.bin > bootloader.bin
|
||||
@$(IMAGE_GEN) -bld_img bootloader.bin neorv32_bootloader_image.vhd $(shell basename $(CURDIR))
|
||||
@echo "Installing bootloader image to $(NEORV32_RTL_PATH)/neorv32_bootloader_image.vhd"
|
||||
@cp neorv32_bootloader_image.vhd $(NEORV32_RTL_PATH)/.
|
||||
@rm -f neorv32_bootloader_image.vhd text.bin rodata.bin data.bin
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Check toolchain
|
||||
# -----------------------------------------------------------------------------
|
||||
check: $(IMAGE_GEN)
|
||||
@echo "---------------- Check: NEORV32_HOME folder ----------------"
|
||||
ifneq ($(shell [ -e $(NEORV32_HOME_MARKER) ] && echo 1 || echo 0 ), 1)
|
||||
$(error NEORV32_HOME folder not found!)
|
||||
endif
|
||||
@echo "NEORV32_HOME: $(NEORV32_HOME)"
|
||||
@echo "---------------- Check: $(CC) ----------------"
|
||||
@$(CC) -v
|
||||
@echo "---------------- Check: $(LD) ----------------"
|
||||
@$(LD) -V
|
||||
@echo "---------------- Check: $(OBJDUMP) ----------------"
|
||||
@$(OBJDUMP) -V
|
||||
@echo "---------------- Check: $(OBJCOPY) ----------------"
|
||||
@$(OBJCOPY) -V
|
||||
@echo "---------------- Check: $(SIZE) ----------------"
|
||||
@$(SIZE) -V
|
||||
@echo "---------------- Check: NEORV32 image_gen ----------------"
|
||||
@$(IMAGE_GEN) -help
|
||||
@echo "---------------- Check: native gcc ----------------"
|
||||
@$(CC_X86) -v
|
||||
@echo
|
||||
@echo "Toolchain check OK"
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Show configuration
|
||||
# -----------------------------------------------------------------------------
|
||||
info:
|
||||
@echo "---------------- Info: Project ----------------"
|
||||
@echo "Project: $(shell basename $(CURDIR))"
|
||||
@echo "Project source files: $(APP_SRC)"
|
||||
@echo "Project include folders: $(NEORV32_INC_PATH) $(APP_INC)"
|
||||
@echo "Project object files: $(OBJ)"
|
||||
@echo "---------------- Info: NEORV32 ----------------"
|
||||
@echo "NEORV32 home folder (NEORV32_HOME): $(NEORV32_HOME)"
|
||||
@echo "IMAGE_GEN: $(IMAGE_GEN)"
|
||||
@echo "---------------- Info: RISC-V CPU ----------------"
|
||||
@echo "MARCH: $(MARCH)"
|
||||
@echo "MABI: $(MABI)"
|
||||
@echo "---------------- Info: RISC-V Toolchain ----------------"
|
||||
@echo "Toolchain: $(RISCV_TOLLCHAIN)"
|
||||
@echo "CC: $(CC)"
|
||||
@echo "LD: $(LD)"
|
||||
@echo "OBJDUMP: $(OBJDUMP)"
|
||||
@echo "OBJCOPY: $(OBJCOPY)"
|
||||
@echo "SIZE: $(SIZE)"
|
||||
@echo "---------------- Info: C Lib ----------------"
|
||||
@echo "CLIB: $(LIBC_PATH)"
|
||||
@echo "GCCLIB: $(LIBGCC_PATH)"
|
||||
@echo "---------------- Info: Flags ----------------"
|
||||
@echo "CC_OPTS: $(CC_OPTS)"
|
||||
@echo "LD_OPTS: $(LD_OPTS)"
|
||||
@echo "---------------- Info: Host Native GCC ----------------"
|
||||
@echo "CC_X86: $(CC_X86)"
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Show final ELF details (just for debugging)
|
||||
# -----------------------------------------------------------------------------
|
||||
elf_info: main.elf
|
||||
@$(OBJDUMP) -x main.elf
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Help
|
||||
# -----------------------------------------------------------------------------
|
||||
help:
|
||||
@echo "<<< NEORV32 Application Makefile >>>"
|
||||
@echo "Make sure to add the bin folder of RISC-V GCC to your PATH variable."
|
||||
@echo "Targets:"
|
||||
@echo " help - show this text"
|
||||
@echo " check - check toolchain"
|
||||
@echo " info - show makefile/toolchain configuration"
|
||||
@echo " compile - compile and generate <neorv32_exe.bin> executable for upload via bootloader"
|
||||
@echo " install - compile, generate and install VHDL IMEM boot image"
|
||||
@echo " all - compile and generate <neorv32_exe.bin> executable for upload via bootloader and generate and install VHDL IMEM boot image"
|
||||
@echo " clean - clean up project"
|
||||
@echo " clean_all - clean up project, core libraries and image generator"
|
||||
@echo " bootloader - compile, generate and install VHDL BOOTROM bott image (for bootloader only!)"
|
||||
|
||||
|
||||
# -----------------------------------------------------------------------------
|
||||
# Clean up
|
||||
# -----------------------------------------------------------------------------
|
||||
clean:
|
||||
@rm -f *.elf *.o *.bin *.out *.s
|
||||
|
||||
clean_all: clean
|
||||
@rm -f $(OBJ) $(IMAGE_GEN)
|
||||
|
||||
Loading…
Add table
Add a link
Reference in a new issue