[sw] no more use of "neorv32_uart_*" legacy wrappers

all of the software is now using `neorv32_uart0_*` instead of the legacy wrappers `neorv32_uart_*`; however, the legacy wrappers are still implemented
This commit is contained in:
stnolting 2021-10-12 16:19:18 +02:00
parent f81370ab2c
commit e44cb43819
16 changed files with 383 additions and 383 deletions

View file

@ -78,34 +78,34 @@ int main() {
neorv32_rte_setup();
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// Disable compilation by default
#ifndef RUN_CHECK
#warning Program HAS NOT BEEN COMPILED! Use >>make USER_FLAGS+=-DRUN_CHECK clean_all exe<< to compile it.
// inform the user if you are actually executing this
neorv32_uart_printf("ERROR! Program has not been compiled. Use >>make USER_FLAGS+=-DRUN_CHECK clean_all exe<< to compile it.\n");
neorv32_uart0_printf("ERROR! Program has not been compiled. Use >>make USER_FLAGS+=-DRUN_CHECK clean_all exe<< to compile it.\n");
return 1;
#endif
// intro
neorv32_uart_printf("NEORV32 'Zbb' Bit-Manipulation Extension Test\n\n");
neorv32_uart0_printf("NEORV32 'Zbb' Bit-Manipulation Extension Test\n\n");
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
// check if Zbb extension is implemented at all
if ((NEORV32_SYSINFO.CPU & (1<<SYSINFO_CPU_ZBB)) == 0) {
neorv32_uart_print("Error! <Zbb> extension not synthesized!\n");
neorv32_uart0_print("Error! <Zbb> extension not synthesized!\n");
return 1;
}
neorv32_uart_printf("Starting Zbb bit-manipulation extension tests (%i test cases per instruction)...\n", num_tests);
neorv32_uart0_printf("Starting Zbb bit-manipulation extension tests (%i test cases per instruction)...\n", num_tests);
// ANDN
neorv32_uart_printf("\nANDN:\n");
neorv32_uart0_printf("\nANDN:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -117,7 +117,7 @@ int main() {
print_report(err_cnt, num_tests);
// ORN
neorv32_uart_printf("\nORN:\n");
neorv32_uart0_printf("\nORN:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -129,7 +129,7 @@ int main() {
print_report(err_cnt, num_tests);
// XNOR
neorv32_uart_printf("\nXNOR:\n");
neorv32_uart0_printf("\nXNOR:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -143,7 +143,7 @@ int main() {
// CLZ
neorv32_uart_printf("\nCLZ:\n");
neorv32_uart0_printf("\nCLZ:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -154,7 +154,7 @@ int main() {
print_report(err_cnt, num_tests);
// CTZ
neorv32_uart_printf("\nCTZ:\n");
neorv32_uart0_printf("\nCTZ:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -167,7 +167,7 @@ int main() {
// CPOP
neorv32_uart_printf("\nCPOP:\n");
neorv32_uart0_printf("\nCPOP:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -180,7 +180,7 @@ int main() {
// MAX
neorv32_uart_printf("\nMAX:\n");
neorv32_uart0_printf("\nMAX:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -192,7 +192,7 @@ int main() {
print_report(err_cnt, num_tests);
// MAXU
neorv32_uart_printf("\nMAXU:\n");
neorv32_uart0_printf("\nMAXU:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -204,7 +204,7 @@ int main() {
print_report(err_cnt, num_tests);
// MIN
neorv32_uart_printf("\nMIN:\n");
neorv32_uart0_printf("\nMIN:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -216,7 +216,7 @@ int main() {
print_report(err_cnt, num_tests);
// MINU
neorv32_uart_printf("\nMINU:\n");
neorv32_uart0_printf("\nMINU:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -230,7 +230,7 @@ int main() {
// SEXT.B
neorv32_uart_printf("\nSEXT.B:\n");
neorv32_uart0_printf("\nSEXT.B:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -241,7 +241,7 @@ int main() {
print_report(err_cnt, num_tests);
// SEXT.H
neorv32_uart_printf("\nSEXT.H:\n");
neorv32_uart0_printf("\nSEXT.H:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -252,7 +252,7 @@ int main() {
print_report(err_cnt, num_tests);
// ZEXT.H
neorv32_uart_printf("\nZEXT.H:\n");
neorv32_uart0_printf("\nZEXT.H:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -265,7 +265,7 @@ int main() {
// ROL
neorv32_uart_printf("\nROL:\n");
neorv32_uart0_printf("\nROL:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -277,7 +277,7 @@ int main() {
print_report(err_cnt, num_tests);
// ROR
neorv32_uart_printf("\nROR:\n");
neorv32_uart0_printf("\nROR:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -289,7 +289,7 @@ int main() {
print_report(err_cnt, num_tests);
// RORI
neorv32_uart_printf("\nRORI (imm=20):\n"); // FIXME: static immediate
neorv32_uart0_printf("\nRORI (imm=20):\n"); // FIXME: static immediate
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -302,7 +302,7 @@ int main() {
// ORC.B
neorv32_uart_printf("\nORCB:\n");
neorv32_uart0_printf("\nORCB:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -315,7 +315,7 @@ int main() {
// REV8
neorv32_uart_printf("\nREV8:\n");
neorv32_uart0_printf("\nREV8:\n");
err_cnt = 0;
for (i=0;i<num_tests; i++) {
opa = xorshift32();
@ -326,7 +326,7 @@ int main() {
print_report(err_cnt, num_tests);
neorv32_uart_printf("\nBit manipulation extension tests done.\n");
neorv32_uart0_printf("\nBit manipulation extension tests done.\n");
return 0;
}
@ -362,8 +362,8 @@ uint32_t xorshift32(void) {
uint32_t check_result(uint32_t num, uint32_t opa, uint32_t opb, uint32_t ref, uint32_t res) {
if (ref != res) {
neorv32_uart_printf("%u: opa = 0x%x, opb = 0x%x : ref = 0x%x vs res = 0x%x ", num, opa, opb, ref, res);
neorv32_uart_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%u: opa = 0x%x, opb = 0x%x : ref = 0x%x vs res = 0x%x ", num, opa, opb, ref, res);
neorv32_uart0_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
return 1;
}
else {
@ -380,12 +380,12 @@ uint32_t check_result(uint32_t num, uint32_t opa, uint32_t opb, uint32_t ref, ui
**************************************************************************/
void print_report(int num_err, int num_tests) {
neorv32_uart_printf("Errors: %i/%i ", num_err, num_tests);
neorv32_uart0_printf("Errors: %i/%i ", num_err, num_tests);
if (num_err == 0) {
neorv32_uart_printf("%c[1m[ok]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[ok]%c[0m\n", 27, 27);
}
else {
neorv32_uart_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
}
}

View file

@ -74,11 +74,11 @@ void blink_led_c(void);
int main() {
// init UART (primary UART = UART0; if no id number is specified the primary UART is used) at default baud rate, no parity bits, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check if GPIO unit is implemented at all
if (neorv32_gpio_available() == 0) {
neorv32_uart_print("Error! No GPIO unit synthesized!\n");
neorv32_uart0_print("Error! No GPIO unit synthesized!\n");
return 1; // nope, no GPIO unit synthesized
}
@ -87,7 +87,7 @@ int main() {
neorv32_rte_setup();
// say hello
neorv32_uart_print("Blinking LED demo program\n");
neorv32_uart0_print("Blinking LED demo program\n");
// use ASM version of LED blinking (file: blink_led_in_asm.S)

View file

@ -151,7 +151,7 @@ portable_init(core_portable *p, int *argc, char *argv[])
/* NEORV32-specific */
neorv32_cpu_dint(); // no interrupt, thanks
neorv32_rte_setup(); // capture all exceptions and give debug information, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// Disable coremark compilation by default
@ -159,7 +159,7 @@ portable_init(core_portable *p, int *argc, char *argv[])
#warning COREMARK HAS NOT BEEN COMPILED! Use >>make USER_FLAGS+=-DRUN_COREMARK clean_all exe<< to compile it.
// inform the user if you are actually executing this
neorv32_uart_printf("ERROR! CoreMark has not been compiled. Use >>make USER_FLAGS+=-DRUN_COREMARK clean_all exe<< to compile it.\n");
neorv32_uart0_printf("ERROR! CoreMark has not been compiled. Use >>make USER_FLAGS+=-DRUN_COREMARK clean_all exe<< to compile it.\n");
while(1);
#endif
@ -183,8 +183,8 @@ portable_init(core_portable *p, int *argc, char *argv[])
neorv32_cpu_csr_write(CSR_MHPMCOUNTER13, 0); neorv32_cpu_csr_write(CSR_MHPMEVENT13, 1 << HPMCNT_EVENT_TRAP);
neorv32_cpu_csr_write(CSR_MHPMCOUNTER14, 0); neorv32_cpu_csr_write(CSR_MHPMEVENT14, 1 << HPMCNT_EVENT_ILLEGAL);
neorv32_uart_printf("NEORV32: Processor running at %u Hz\n", (uint32_t)NEORV32_SYSINFO.CLK);
neorv32_uart_printf("NEORV32: Executing coremark (%u iterations). This may take some time...\n\n", (uint32_t)ITERATIONS);
neorv32_uart0_printf("NEORV32: Processor running at %u Hz\n", (uint32_t)NEORV32_SYSINFO.CLK);
neorv32_uart0_printf("NEORV32: Executing coremark (%u iterations). This may take some time...\n\n", (uint32_t)ITERATIONS);
// clear cycle counter
neorv32_cpu_set_mcycle(0);
@ -231,28 +231,28 @@ portable_fini(core_portable *p)
exe_time.uint64 = (uint64_t)get_time();
exe_instructions.uint64 = neorv32_cpu_get_instret();
neorv32_uart_printf("\nNEORV32: All reported numbers only show the integer part.\n\n");
neorv32_uart0_printf("\nNEORV32: All reported numbers only show the integer part.\n\n");
neorv32_uart_printf("NEORV32: HPM results\n");
if (num_hpm_cnts_global == 0) {neorv32_uart_printf("no HPMs available\n"); }
if (num_hpm_cnts_global > 0) {neorv32_uart_printf("# Retired compr. instructions: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER3)); }
if (num_hpm_cnts_global > 1) {neorv32_uart_printf("# I-fetch wait cycles: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER4)); }
if (num_hpm_cnts_global > 2) {neorv32_uart_printf("# I-issue wait cycles: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER5)); }
if (num_hpm_cnts_global > 3) {neorv32_uart_printf("# Multi-cycle ALU wait cycles: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER6)); }
if (num_hpm_cnts_global > 4) {neorv32_uart_printf("# Load operations: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER7)); }
if (num_hpm_cnts_global > 5) {neorv32_uart_printf("# Store operations: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER8)); }
if (num_hpm_cnts_global > 6) {neorv32_uart_printf("# Load/store wait cycles: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER9)); }
if (num_hpm_cnts_global > 7) {neorv32_uart_printf("# Unconditional jumps: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER10)); }
if (num_hpm_cnts_global > 8) {neorv32_uart_printf("# Conditional branches (all): %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER11)); }
if (num_hpm_cnts_global > 9) {neorv32_uart_printf("# Conditional branches (taken): %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER12)); }
if (num_hpm_cnts_global > 10) {neorv32_uart_printf("# Entered traps: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER13)); }
if (num_hpm_cnts_global > 11) {neorv32_uart_printf("# Illegal operations: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER14)); }
neorv32_uart_printf("\n");
neorv32_uart0_printf("NEORV32: HPM results\n");
if (num_hpm_cnts_global == 0) {neorv32_uart0_printf("no HPMs available\n"); }
if (num_hpm_cnts_global > 0) {neorv32_uart0_printf("# Retired compr. instructions: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER3)); }
if (num_hpm_cnts_global > 1) {neorv32_uart0_printf("# I-fetch wait cycles: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER4)); }
if (num_hpm_cnts_global > 2) {neorv32_uart0_printf("# I-issue wait cycles: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER5)); }
if (num_hpm_cnts_global > 3) {neorv32_uart0_printf("# Multi-cycle ALU wait cycles: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER6)); }
if (num_hpm_cnts_global > 4) {neorv32_uart0_printf("# Load operations: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER7)); }
if (num_hpm_cnts_global > 5) {neorv32_uart0_printf("# Store operations: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER8)); }
if (num_hpm_cnts_global > 6) {neorv32_uart0_printf("# Load/store wait cycles: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER9)); }
if (num_hpm_cnts_global > 7) {neorv32_uart0_printf("# Unconditional jumps: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER10)); }
if (num_hpm_cnts_global > 8) {neorv32_uart0_printf("# Conditional branches (all): %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER11)); }
if (num_hpm_cnts_global > 9) {neorv32_uart0_printf("# Conditional branches (taken): %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER12)); }
if (num_hpm_cnts_global > 10) {neorv32_uart0_printf("# Entered traps: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER13)); }
if (num_hpm_cnts_global > 11) {neorv32_uart0_printf("# Illegal operations: %u\n", (uint32_t)neorv32_cpu_csr_read(CSR_MHPMCOUNTER14)); }
neorv32_uart0_printf("\n");
neorv32_uart_printf("NEORV32: Executed instructions 0x%x_%x\n", (uint32_t)exe_instructions.uint32[1], (uint32_t)exe_instructions.uint32[0]);
neorv32_uart_printf("NEORV32: CoreMark core clock cycles 0x%x_%x\n", (uint32_t)exe_time.uint32[1], (uint32_t)exe_time.uint32[0]);
neorv32_uart0_printf("NEORV32: Executed instructions 0x%x_%x\n", (uint32_t)exe_instructions.uint32[1], (uint32_t)exe_instructions.uint32[0]);
neorv32_uart0_printf("NEORV32: CoreMark core clock cycles 0x%x_%x\n", (uint32_t)exe_time.uint32[1], (uint32_t)exe_time.uint32[0]);
uint64_t average_cpi_int = exe_time.uint64 / exe_instructions.uint64;
neorv32_uart_printf("NEORV32: Average CPI (integer part only): %u cycles/instruction\n", (uint32_t)average_cpi_int);
neorv32_uart0_printf("NEORV32: Average CPI (integer part only): %u cycles/instruction\n", (uint32_t)average_cpi_int);
}

View file

@ -683,9 +683,9 @@ uart_send_char(char c)
/* NEORV32-specific */
if (c == '\n') {
neorv32_uart_putc('\r');
neorv32_uart0_putc('\r');
}
neorv32_uart_putc(c);
neorv32_uart0_putc(c);
}
int

View file

@ -106,7 +106,7 @@ int main( void )
prvSetupHardware();
/* say hi */
neorv32_uart_printf("FreeRTOS %s on NEORV32 Demo\n\n", tskKERNEL_VERSION_NUMBER);
neorv32_uart0_printf("FreeRTOS %s on NEORV32 Demo\n\n", tskKERNEL_VERSION_NUMBER);
/* The mainCREATE_SIMPLE_BLINKY_DEMO_ONLY setting is described at the top
of this file. */
@ -128,7 +128,7 @@ static void prvSetupHardware( void )
neorv32_gpio_port_set(0);
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
@ -145,7 +145,7 @@ void vToggleLED( void )
void vSendString( const char * pcString )
{
neorv32_uart_print( ( const char * ) pcString );
neorv32_uart0_print( ( const char * ) pcString );
}
/*-----------------------------------------------------------*/
@ -163,7 +163,7 @@ void vApplicationMallocFailedHook( void )
to query the size of free heap space that remains (although it does not
provide information on how the remaining heap might be fragmented). */
taskDISABLE_INTERRUPTS();
neorv32_uart_print("FreeRTOS_FAULT: vApplicationMallocFailedHook (solution: increase 'configTOTAL_HEAP_SIZE' in FreeRTOSConfig.h)\n");
neorv32_uart0_print("FreeRTOS_FAULT: vApplicationMallocFailedHook (solution: increase 'configTOTAL_HEAP_SIZE' in FreeRTOSConfig.h)\n");
__asm volatile( "ebreak" );
for( ;; );
}
@ -194,7 +194,7 @@ void vApplicationStackOverflowHook( TaskHandle_t pxTask, char *pcTaskName )
configCHECK_FOR_STACK_OVERFLOW is defined to 1 or 2. This hook
function is called if a stack overflow is detected. */
taskDISABLE_INTERRUPTS();
neorv32_uart_print("FreeRTOS_FAULT: vApplicationStackOverflowHook\n");
neorv32_uart0_print("FreeRTOS_FAULT: vApplicationStackOverflowHook\n");
__asm volatile( "ebreak" );
for( ;; );
}
@ -217,7 +217,7 @@ void vApplicationTickHook( void )
/* This handler is responsible for handling all interrupts. Only the machine timer interrupt is handled by the kernel. */
void SystemIrqHandler( uint32_t mcause )
{
neorv32_uart_printf("freeRTOS: Unknown interrupt (0x%x)\n", mcause);
neorv32_uart0_printf("freeRTOS: Unknown interrupt (0x%x)\n", mcause);
}
@ -232,8 +232,8 @@ void SystemIrqHandler( uint32_t mcause )
int main() {
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart_print("ERROR! FreeRTOS has not been compiled. Use >>make USER_FLAGS+=-DRUN_FREERTOS_DEMO clean_all exe<< to compile it.\n");
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_print("ERROR! FreeRTOS has not been compiled. Use >>make USER_FLAGS+=-DRUN_FREERTOS_DEMO clean_all exe<< to compile it.\n");
return 1;
}
#endif

View file

@ -75,12 +75,12 @@ int main() {
// setup UART0 at default baud rate, no parity bits, no hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check if NEOLED unit is implemented at all, abort if not
if (neorv32_neoled_available() == 0) {
neorv32_uart_printf("Error! No NEOLED unit synthesized!\n");
neorv32_uart0_printf("Error! No NEOLED unit synthesized!\n");
return 1;
}

View file

@ -66,7 +66,7 @@ void generate_histogram(void);
int main(void) {
// check if UART unit is implemented at all
if (neorv32_uart_available() == 0) {
if (neorv32_uart0_available() == 0) {
return 1;
}
@ -76,17 +76,17 @@ int main(void) {
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
// intro
neorv32_uart_printf("\n--- TRNG Demo ---\n\n");
neorv32_uart0_printf("\n--- TRNG Demo ---\n\n");
// check if TRNG unit is implemented at all
if (neorv32_trng_available() == 0) {
neorv32_uart_printf("No TRNG implemented.");
neorv32_uart0_printf("No TRNG implemented.");
return 1;
}
@ -96,14 +96,14 @@ int main(void) {
while(1) {
// main menu
neorv32_uart_printf("\nCommands:\n"
neorv32_uart0_printf("\nCommands:\n"
" n: Print 8-bit random numbers (abort by pressing any key)\n"
" h: Generate and print histogram\n");
neorv32_uart_printf("CMD:> ");
char cmd = neorv32_uart_getc();
neorv32_uart_putc(cmd); // echo
neorv32_uart_printf("\n");
neorv32_uart0_printf("CMD:> ");
char cmd = neorv32_uart0_getc();
neorv32_uart0_putc(cmd); // echo
neorv32_uart0_printf("\n");
if (cmd == 'n') {
print_random_data();
@ -112,7 +112,7 @@ int main(void) {
generate_histogram();
}
else {
neorv32_uart_printf("Invalid command.\n");
neorv32_uart0_printf("Invalid command.\n");
}
}
@ -132,16 +132,16 @@ void print_random_data(void) {
while(1) {
err = neorv32_trng_get(&trng_data);
if (err) {
neorv32_uart_printf("\nTRNG error!\n");
neorv32_uart0_printf("\nTRNG error!\n");
break;
}
neorv32_uart_printf("%u ", (uint32_t)(trng_data));
neorv32_uart0_printf("%u ", (uint32_t)(trng_data));
num_samples++;
if (neorv32_uart_char_received()) { // abort when key pressed
if (neorv32_uart0_char_received()) { // abort when key pressed
break;
}
}
neorv32_uart_printf("\nPrinted samples: %u\n", num_samples);
neorv32_uart0_printf("\nPrinted samples: %u\n", num_samples);
}
@ -156,10 +156,10 @@ void generate_histogram(void) {
int err = 0;
uint8_t trng_data;
neorv32_uart_printf("Press any key to start.\n");
neorv32_uart0_printf("Press any key to start.\n");
while(neorv32_uart_char_received() == 0);
neorv32_uart_printf("Sampling... Press any key to stop.\n");
while(neorv32_uart0_char_received() == 0);
neorv32_uart0_printf("Sampling... Press any key to stop.\n");
// clear histogram
for (i=0; i<256; i++) {
@ -174,11 +174,11 @@ void generate_histogram(void) {
cnt++;
if (err) {
neorv32_uart_printf("\nTRNG error!\n");
neorv32_uart0_printf("\nTRNG error!\n");
break;
}
if (neorv32_uart_char_received()) { // abort when key pressed
if (neorv32_uart0_char_received()) { // abort when key pressed
break;
}
@ -188,12 +188,12 @@ void generate_histogram(void) {
}
// print histogram
neorv32_uart_printf("Histogram [random data value] : [# occurences]\n");
neorv32_uart0_printf("Histogram [random data value] : [# occurences]\n");
for (i=0; i<256; i++) {
neorv32_uart_printf("%u: %u\n", (uint32_t)i, hist[i]);
neorv32_uart0_printf("%u: %u\n", (uint32_t)i, hist[i]);
}
neorv32_uart_printf("\nSamples: %u\n", cnt);
neorv32_uart0_printf("\nSamples: %u\n", cnt);
// average
uint64_t average = 0;
@ -201,13 +201,13 @@ void generate_histogram(void) {
average += (uint64_t)hist[i] * i;
}
average = average / ((uint64_t)cnt);
neorv32_uart_printf("Average value: %u ", (uint32_t)average);
neorv32_uart0_printf("Average value: %u ", (uint32_t)average);
if (((uint8_t)average) == ((uint8_t)(255/2))) {
neorv32_uart_printf("%c[1m[TEST OK]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[TEST OK]%c[0m\n", 27, 27);
}
else {
neorv32_uart_printf("%c[1m[TEST FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[TEST FAILED]%c[0m\n", 27, 27);
}
}

View file

@ -73,7 +73,7 @@ int main() {
int bus_claimed = 0;
// check if UART unit is implemented at all
if (neorv32_uart_available() == 0) {
if (neorv32_uart0_available() == 0) {
return 1;
}
@ -84,24 +84,24 @@ int main() {
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
// intro
neorv32_uart_printf("\n--- TWI Bus Explorer ---\n\n");
neorv32_uart0_printf("\n--- TWI Bus Explorer ---\n\n");
// check if TWI unit is implemented at all
if (neorv32_twi_available() == 0) {
neorv32_uart_printf("No TWI unit implemented.");
neorv32_uart0_printf("No TWI unit implemented.");
return 1;
}
// info
neorv32_uart_printf("This program allows to create TWI transfers by hand.\n"
neorv32_uart0_printf("This program allows to create TWI transfers by hand.\n"
"Type 'help' to see the help menu.\n\n");
// configure TWI, second slowest clock, no clock-stretching
@ -112,16 +112,16 @@ int main() {
// Main menu
for (;;) {
neorv32_uart_printf("TWI_EXPLORER:> ");
length = neorv32_uart_scan(buffer, 8, 1);
neorv32_uart_printf("\n");
neorv32_uart0_printf("TWI_EXPLORER:> ");
length = neorv32_uart0_scan(buffer, 8, 1);
neorv32_uart0_printf("\n");
if (!length) // nothing to be done
continue;
// decode input and execute command
if (!strcmp(buffer, "help")) {
neorv32_uart_printf("Available commands:\n"
neorv32_uart0_printf("Available commands:\n"
" help - show this text\n"
" scan - scan bus for devices\n"
" start - generate START condition\n"
@ -138,7 +138,7 @@ int main() {
}
else if (!strcmp(buffer, "stop")) {
if (bus_claimed == 0) {
neorv32_uart_printf("No active I2C transmission.\n");
neorv32_uart0_printf("No active I2C transmission.\n");
continue;
}
neorv32_twi_generate_stop(); // generate STOP condition
@ -152,7 +152,7 @@ int main() {
}
else if (!strcmp(buffer, "send")) {
if (bus_claimed == 0) {
neorv32_uart_printf("No active I2C transmission. Generate a START condition first.\n");
neorv32_uart0_printf("No active I2C transmission. Generate a START condition first.\n");
continue;
}
else {
@ -160,7 +160,7 @@ int main() {
}
}
else {
neorv32_uart_printf("Invalid command. Type 'help' to see all commands.\n");
neorv32_uart0_printf("Invalid command. Type 'help' to see all commands.\n");
}
}
@ -175,17 +175,17 @@ void set_speed(void) {
char terminal_buffer[2];
neorv32_uart_printf("Select new clock prescaler (0..7): ");
neorv32_uart_scan(terminal_buffer, 2, 1); // 1 hex char plus '\0'
neorv32_uart0_printf("Select new clock prescaler (0..7): ");
neorv32_uart0_scan(terminal_buffer, 2, 1); // 1 hex char plus '\0'
uint8_t prsc = (uint8_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
if ((prsc >= 0) && (prsc < 8)) { // valid?
NEORV32_TWI.CTRL = 0; // reset
NEORV32_TWI.CTRL = (1 << TWI_CTRL_EN) | (prsc << TWI_CTRL_PRSC0);
neorv32_uart_printf("\nDone.\n");
neorv32_uart0_printf("\nDone.\n");
}
else {
neorv32_uart_printf("\nInvalid selection!\n");
neorv32_uart0_printf("\nInvalid selection!\n");
return;
}
@ -203,7 +203,7 @@ void set_speed(void) {
default: div = 0; break;
}
uint32_t clock = NEORV32_SYSINFO.CLK / div;
neorv32_uart_printf("New I2C clock: %u Hz\n", clock);
neorv32_uart0_printf("New I2C clock: %u Hz\n", clock);
}
@ -212,20 +212,20 @@ void set_speed(void) {
**************************************************************************/
void scan_twi(void) {
neorv32_uart_printf("Scanning TWI bus...\n");
neorv32_uart0_printf("Scanning TWI bus...\n");
uint8_t i, num_devices = 0;
for (i=0; i<128; i++) {
uint8_t twi_ack = neorv32_twi_start_trans((uint8_t)(2*i+1));
neorv32_twi_generate_stop();
if (twi_ack == 0) {
neorv32_uart_printf("+ Found device at write-address 0x%x\n", (uint32_t)(2*i));
neorv32_uart0_printf("+ Found device at write-address 0x%x\n", (uint32_t)(2*i));
num_devices++;
}
}
if (!num_devices) {
neorv32_uart_printf("No devices found.\n");
neorv32_uart0_printf("No devices found.\n");
}
}
@ -238,16 +238,16 @@ void send_twi(void) {
char terminal_buffer[4];
// enter data
neorv32_uart_printf("Enter TX data (2 hex chars): ");
neorv32_uart_scan(terminal_buffer, 3, 1); // 2 hex chars for address plus '\0'
neorv32_uart0_printf("Enter TX data (2 hex chars): ");
neorv32_uart0_scan(terminal_buffer, 3, 1); // 2 hex chars for address plus '\0'
uint8_t tmp = (uint8_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
uint8_t res = neorv32_twi_trans(tmp);
neorv32_uart_printf("\nRX data: 0x%x\n", (uint32_t)neorv32_twi_get_data());
neorv32_uart_printf("Response: ");
neorv32_uart0_printf("\nRX data: 0x%x\n", (uint32_t)neorv32_twi_get_data());
neorv32_uart0_printf("Response: ");
if (res == 0)
neorv32_uart_printf("ACK\n");
neorv32_uart0_printf("ACK\n");
else
neorv32_uart_printf("NACK\n");
neorv32_uart0_printf("NACK\n");
}

View file

@ -66,7 +66,7 @@ int main() {
}
// check if UART unit is implemented at all
if (neorv32_uart_available() == 0) {
if (neorv32_uart0_available() == 0) {
return 1; // nope, no UART unit synthesized
}
@ -76,27 +76,27 @@ int main() {
neorv32_rte_setup();
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
// simple text output via UART (strings only)
neorv32_uart_print("\nWatchdog system reset demo program\n\n");
neorv32_uart0_print("\nWatchdog system reset demo program\n\n");
// show the cause of the last processor reset
neorv32_uart_print("Cause of last processor reset: ");
neorv32_uart0_print("Cause of last processor reset: ");
uint8_t wdt_cause = neorv32_wdt_get_cause();
if (wdt_cause == 0) {
neorv32_uart_print("External reset\n");
neorv32_uart0_print("External reset\n");
}
else if (wdt_cause == 1) {
neorv32_uart_print("Watchdog\n");
neorv32_uart0_print("Watchdog\n");
}
else {
neorv32_uart_print("Undefined\n");
neorv32_uart0_print("Undefined\n");
}
@ -109,7 +109,7 @@ int main() {
neorv32_uart_print("\n\nWill reset WDT 64 times.\n"
neorv32_uart0_print("\n\nWill reset WDT 64 times.\n"
"A system reset will be executed in the following time out.\n"
"Press any key to trigger manual WDT hardware reset by WDT access with wrong password.\n"
"Restart this program after reset to check for the reset cause.\n\n"
@ -117,18 +117,18 @@ int main() {
uint8_t i;
for (i=0; i<64; i++) {
neorv32_uart_putc('.');
neorv32_uart0_putc('.');
neorv32_wdt_reset(); // reset watchdog
neorv32_cpu_delay_ms(80); // wait some time
// trigger manual reset if key pressed
if (neorv32_uart_char_received()) { // just check, if a char has been received
if (neorv32_uart0_char_received()) { // just check, if a char has been received
neorv32_wdt_force(); // access wdt with wrong password
}
}
while (1) { // wait for the watchdog time-out or trigger manual reset if key pressed
if (neorv32_uart_char_received()) { // just check, if a char has been received
if (neorv32_uart0_char_received()) { // just check, if a char has been received
neorv32_wdt_force(); // access wdt with wrong password
}
}

View file

@ -104,12 +104,12 @@ int main (void)
{ /* ***** NEORV32-SPECIFIC ***** */
neorv32_cpu_dint(); // no interrupt, thanks
neorv32_rte_setup(); // capture all exceptions and give debug information, ho hw flow control
neorv32_uart_setup(19200, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(19200, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
neorv32_uart_printf("NEORV32: Processor running at %u Hz\n", (uint32_t)NEORV32_SYSINFO.CLK);
neorv32_uart_printf("NEORV32: Executing Dhrystone (%u iterations). This may take some time...\n\n", (uint32_t)DHRY_ITERS);
neorv32_uart0_printf("NEORV32: Processor running at %u Hz\n", (uint32_t)NEORV32_SYSINFO.CLK);
neorv32_uart0_printf("NEORV32: Executing Dhrystone (%u iterations). This may take some time...\n\n", (uint32_t)DHRY_ITERS);
// clear cycle counter
neorv32_cpu_set_mcycle(0);
@ -118,7 +118,7 @@ int main (void)
#warning DHRYSTONE HAS NOT BEEN COMPILED! Use >>make USER_FLAGS+=-DRUN_DHRYSTONE clean_all exe<< to compile it.
// inform the user if you are actually executing this
neorv32_uart_printf("ERROR! CoreMark has not been compiled. Use >>make USER_FLAGS+=-DRUN_COREMARK clean_all exe<< to compile it.\n");
neorv32_uart0_printf("ERROR! CoreMark has not been compiled. Use >>make USER_FLAGS+=-DRUN_COREMARK clean_all exe<< to compile it.\n");
while(1);
#endif
@ -150,32 +150,32 @@ int main (void)
/* Warning: With 16-Bit processors and Number_Of_Runs > 32000, */
/* overflow may occur for this array element. */
neorv32_uart_printf ("\n");
neorv32_uart_printf ("Dhrystone Benchmark, Version 2.1 (Language: C)\n");
neorv32_uart_printf ("\n");
neorv32_uart0_printf ("\n");
neorv32_uart0_printf ("Dhrystone Benchmark, Version 2.1 (Language: C)\n");
neorv32_uart0_printf ("\n");
if (Reg)
{
neorv32_uart_printf ("Program compiled with 'register' attribute\n");
neorv32_uart_printf ("\n");
neorv32_uart0_printf ("Program compiled with 'register' attribute\n");
neorv32_uart0_printf ("\n");
}
else
{
neorv32_uart_printf ("Program compiled without 'register' attribute\n");
neorv32_uart_printf ("\n");
neorv32_uart0_printf ("Program compiled without 'register' attribute\n");
neorv32_uart0_printf ("\n");
}
#ifdef DHRY_ITERS
Number_Of_Runs = DHRY_ITERS;
#else
neorv32_uart_printf ("Please give the number of runs through the benchmark: ");
neorv32_uart0_printf ("Please give the number of runs through the benchmark: ");
{
int n;
scanf ("%d", &n);
Number_Of_Runs = n;
}
neorv32_uart_printf ("\n");
neorv32_uart0_printf ("\n");
#endif
neorv32_uart_printf ("Execution starts, %u runs through Dhrystone\n", (uint32_t)Number_Of_Runs);
neorv32_uart0_printf ("Execution starts, %u runs through Dhrystone\n", (uint32_t)Number_Of_Runs);
/***************/
/* Start timer */
@ -266,66 +266,66 @@ int main (void)
} /* ***** /NEORV32-SPECIFIC ***** */
neorv32_uart_printf ("Execution ends\n");
neorv32_uart_printf ("\n");
neorv32_uart_printf ("Final values of the variables used in the benchmark:\n");
neorv32_uart_printf ("\n");
neorv32_uart_printf ("Int_Glob: %u\n", (uint32_t)Int_Glob);
neorv32_uart_printf (" should be: %u\n", 5);
neorv32_uart_printf ("Bool_Glob: %u\n", (uint32_t)Bool_Glob);
neorv32_uart_printf (" should be: %u\n", 1);
neorv32_uart_printf ("Ch_1_Glob: %c\n", (uint32_t)Ch_1_Glob);
neorv32_uart_printf (" should be: %c\n", 'A');
neorv32_uart_printf ("Ch_2_Glob: %c\n", (uint32_t)Ch_2_Glob);
neorv32_uart_printf (" should be: %c\n", 'B');
neorv32_uart_printf ("Arr_1_Glob[8]: %u\n", (uint32_t)Arr_1_Glob[8]);
neorv32_uart_printf (" should be: %u\n", 7);
neorv32_uart_printf ("Arr_2_Glob[8][7]: %u\n", (uint32_t)Arr_2_Glob[8][7]);
neorv32_uart_printf (" should be: Number_Of_Runs + 10\n");
neorv32_uart_printf ("Ptr_Glob->\n");
neorv32_uart_printf (" Ptr_Comp: %u\n", (uint32_t) Ptr_Glob->Ptr_Comp);
neorv32_uart_printf (" should be: (implementation-dependent)\n");
neorv32_uart_printf (" Discr: %u\n", (uint32_t)Ptr_Glob->Discr);
neorv32_uart_printf (" should be: %u\n", 0);
neorv32_uart_printf (" Enum_Comp: %u\n", (uint32_t)Ptr_Glob->variant.var_1.Enum_Comp);
neorv32_uart_printf (" should be: %u\n", 2);
neorv32_uart_printf (" Int_Comp: %u\n", (uint32_t)Ptr_Glob->variant.var_1.Int_Comp);
neorv32_uart_printf (" should be: %u\n", 17);
neorv32_uart_printf (" Str_Comp: %s\n", Ptr_Glob->variant.var_1.Str_Comp);
neorv32_uart_printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n");
neorv32_uart_printf ("Next_Ptr_Glob->\n");
neorv32_uart_printf (" Ptr_Comp: %u\n", (uint32_t) Next_Ptr_Glob->Ptr_Comp);
neorv32_uart_printf (" should be: (implementation-dependent), same as above\n");
neorv32_uart_printf (" Discr: %u\n", (uint32_t)Next_Ptr_Glob->Discr);
neorv32_uart_printf (" should be: %u\n", 0);
neorv32_uart_printf (" Enum_Comp: %u\n", (uint32_t)Next_Ptr_Glob->variant.var_1.Enum_Comp);
neorv32_uart_printf (" should be: %u\n", 1);
neorv32_uart_printf (" Int_Comp: %u\n", (uint32_t)Next_Ptr_Glob->variant.var_1.Int_Comp);
neorv32_uart_printf (" should be: %u\n", 18);
neorv32_uart_printf (" Str_Comp: %s\n",
neorv32_uart0_printf ("Execution ends\n");
neorv32_uart0_printf ("\n");
neorv32_uart0_printf ("Final values of the variables used in the benchmark:\n");
neorv32_uart0_printf ("\n");
neorv32_uart0_printf ("Int_Glob: %u\n", (uint32_t)Int_Glob);
neorv32_uart0_printf (" should be: %u\n", 5);
neorv32_uart0_printf ("Bool_Glob: %u\n", (uint32_t)Bool_Glob);
neorv32_uart0_printf (" should be: %u\n", 1);
neorv32_uart0_printf ("Ch_1_Glob: %c\n", (uint32_t)Ch_1_Glob);
neorv32_uart0_printf (" should be: %c\n", 'A');
neorv32_uart0_printf ("Ch_2_Glob: %c\n", (uint32_t)Ch_2_Glob);
neorv32_uart0_printf (" should be: %c\n", 'B');
neorv32_uart0_printf ("Arr_1_Glob[8]: %u\n", (uint32_t)Arr_1_Glob[8]);
neorv32_uart0_printf (" should be: %u\n", 7);
neorv32_uart0_printf ("Arr_2_Glob[8][7]: %u\n", (uint32_t)Arr_2_Glob[8][7]);
neorv32_uart0_printf (" should be: Number_Of_Runs + 10\n");
neorv32_uart0_printf ("Ptr_Glob->\n");
neorv32_uart0_printf (" Ptr_Comp: %u\n", (uint32_t) Ptr_Glob->Ptr_Comp);
neorv32_uart0_printf (" should be: (implementation-dependent)\n");
neorv32_uart0_printf (" Discr: %u\n", (uint32_t)Ptr_Glob->Discr);
neorv32_uart0_printf (" should be: %u\n", 0);
neorv32_uart0_printf (" Enum_Comp: %u\n", (uint32_t)Ptr_Glob->variant.var_1.Enum_Comp);
neorv32_uart0_printf (" should be: %u\n", 2);
neorv32_uart0_printf (" Int_Comp: %u\n", (uint32_t)Ptr_Glob->variant.var_1.Int_Comp);
neorv32_uart0_printf (" should be: %u\n", 17);
neorv32_uart0_printf (" Str_Comp: %s\n", Ptr_Glob->variant.var_1.Str_Comp);
neorv32_uart0_printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n");
neorv32_uart0_printf ("Next_Ptr_Glob->\n");
neorv32_uart0_printf (" Ptr_Comp: %u\n", (uint32_t) Next_Ptr_Glob->Ptr_Comp);
neorv32_uart0_printf (" should be: (implementation-dependent), same as above\n");
neorv32_uart0_printf (" Discr: %u\n", (uint32_t)Next_Ptr_Glob->Discr);
neorv32_uart0_printf (" should be: %u\n", 0);
neorv32_uart0_printf (" Enum_Comp: %u\n", (uint32_t)Next_Ptr_Glob->variant.var_1.Enum_Comp);
neorv32_uart0_printf (" should be: %u\n", 1);
neorv32_uart0_printf (" Int_Comp: %u\n", (uint32_t)Next_Ptr_Glob->variant.var_1.Int_Comp);
neorv32_uart0_printf (" should be: %u\n", 18);
neorv32_uart0_printf (" Str_Comp: %s\n",
Next_Ptr_Glob->variant.var_1.Str_Comp);
neorv32_uart_printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n");
neorv32_uart_printf ("Int_1_Loc: %u\n", (uint32_t)Int_1_Loc);
neorv32_uart_printf (" should be: %u\n", 5);
neorv32_uart_printf ("Int_2_Loc: %u\n", (uint32_t)Int_2_Loc);
neorv32_uart_printf (" should be: %u\n", 13);
neorv32_uart_printf ("Int_3_Loc: %u\n", (uint32_t)Int_3_Loc);
neorv32_uart_printf (" should be: %u\n", 7);
neorv32_uart_printf ("Enum_Loc: %u\n", (uint32_t)Enum_Loc);
neorv32_uart_printf (" should be: %u\n", 1);
neorv32_uart_printf ("Str_1_Loc: %s\n", Str_1_Loc);
neorv32_uart_printf (" should be: DHRYSTONE PROGRAM, 1'ST STRING\n");
neorv32_uart_printf ("Str_2_Loc: %s\n", Str_2_Loc);
neorv32_uart_printf (" should be: DHRYSTONE PROGRAM, 2'ND STRING\n");
neorv32_uart_printf ("\n");
neorv32_uart0_printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n");
neorv32_uart0_printf ("Int_1_Loc: %u\n", (uint32_t)Int_1_Loc);
neorv32_uart0_printf (" should be: %u\n", 5);
neorv32_uart0_printf ("Int_2_Loc: %u\n", (uint32_t)Int_2_Loc);
neorv32_uart0_printf (" should be: %u\n", 13);
neorv32_uart0_printf ("Int_3_Loc: %u\n", (uint32_t)Int_3_Loc);
neorv32_uart0_printf (" should be: %u\n", 7);
neorv32_uart0_printf ("Enum_Loc: %u\n", (uint32_t)Enum_Loc);
neorv32_uart0_printf (" should be: %u\n", 1);
neorv32_uart0_printf ("Str_1_Loc: %s\n", Str_1_Loc);
neorv32_uart0_printf (" should be: DHRYSTONE PROGRAM, 1'ST STRING\n");
neorv32_uart0_printf ("Str_2_Loc: %s\n", Str_2_Loc);
neorv32_uart0_printf (" should be: DHRYSTONE PROGRAM, 2'ND STRING\n");
neorv32_uart0_printf ("\n");
User_Time = End_Time - Begin_Time;
// if (User_Time < Too_Small_Time)
// {
// neorv32_uart_printf ("Measured time too small to obtain meaningful results\n");
// neorv32_uart_printf ("Please increase number of runs\n");
// neorv32_uart_printf ("\n");
// neorv32_uart0_printf ("Measured time too small to obtain meaningful results\n");
// neorv32_uart0_printf ("Please increase number of runs\n");
// neorv32_uart0_printf ("\n");
// }
// else
{
@ -342,33 +342,33 @@ int main (void)
#endif
*/
{ /* ***** NEORV32-SPECIFIC ***** */
neorv32_uart_printf ("Microseconds for one run through Dhrystone: %u \n", (uint32_t)((User_Time * (Mic_secs_Per_Second / Number_Of_Runs)) / NEORV32_SYSINFO.CLK));
neorv32_uart0_printf ("Microseconds for one run through Dhrystone: %u \n", (uint32_t)((User_Time * (Mic_secs_Per_Second / Number_Of_Runs)) / NEORV32_SYSINFO.CLK));
uint32_t dhry_per_sec = (uint32_t)(NEORV32_SYSINFO.CLK / (User_Time / Number_Of_Runs));
neorv32_uart_printf ("Dhrystones per Second: %u \n\n", (uint32_t)dhry_per_sec);
neorv32_uart0_printf ("Dhrystones per Second: %u \n\n", (uint32_t)dhry_per_sec);
neorv32_uart_printf("NEORV32: << DETAILED RESULTS (integer parts only) >>\n");
neorv32_uart_printf("NEORV32: Total cycles: %u\n", (uint32_t)User_Time);
neorv32_uart_printf("NEORV32: Cycles per second: %u\n", (uint32_t)NEORV32_SYSINFO.CLK);
neorv32_uart_printf("NEORV32: Total runs: %u\n", (uint32_t)Number_Of_Runs);
neorv32_uart0_printf("NEORV32: << DETAILED RESULTS (integer parts only) >>\n");
neorv32_uart0_printf("NEORV32: Total cycles: %u\n", (uint32_t)User_Time);
neorv32_uart0_printf("NEORV32: Cycles per second: %u\n", (uint32_t)NEORV32_SYSINFO.CLK);
neorv32_uart0_printf("NEORV32: Total runs: %u\n", (uint32_t)Number_Of_Runs);
neorv32_uart_printf("\n");
neorv32_uart_printf("NEORV32: DMIPS/s: %u\n", (uint32_t)dhry_per_sec);
neorv32_uart_printf("NEORV32: DMIPS/s/MHz: %u\n", (uint32_t)(dhry_per_sec / (NEORV32_SYSINFO.CLK / 1000000)));
neorv32_uart0_printf("\n");
neorv32_uart0_printf("NEORV32: DMIPS/s: %u\n", (uint32_t)dhry_per_sec);
neorv32_uart0_printf("NEORV32: DMIPS/s/MHz: %u\n", (uint32_t)(dhry_per_sec / (NEORV32_SYSINFO.CLK / 1000000)));
neorv32_uart_printf("\n");
neorv32_uart_printf("NEORV32: VAX DMIPS/s: %u\n", (uint32_t)dhry_per_sec/1757);
neorv32_uart_printf("NEORV32: VAX DMIPS/s/MHz: %u/1757\n", (uint32_t)(dhry_per_sec / (NEORV32_SYSINFO.CLK / 1000000)));
neorv32_uart0_printf("\n");
neorv32_uart0_printf("NEORV32: VAX DMIPS/s: %u\n", (uint32_t)dhry_per_sec/1757);
neorv32_uart0_printf("NEORV32: VAX DMIPS/s/MHz: %u/1757\n", (uint32_t)(dhry_per_sec / (NEORV32_SYSINFO.CLK / 1000000)));
} /* ***** /NEORV32-SPECIFIC ***** */
/*
neorv32_uart_printf ("Microseconds for one run through Dhrystone: ");
//neorv32_uart_printf ("%6.1f \n", Microseconds);
neorv32_uart_printf ("%d \n", (int)Microseconds);
neorv32_uart_printf ("Dhrystones per Second: ");
//neorv32_uart_printf ("%6.1f \n", Dhrystones_Per_Second);
neorv32_uart_printf ("%d \n", (int)Dhrystones_Per_Second);
neorv32_uart_printf ("\n");
neorv32_uart0_printf ("Microseconds for one run through Dhrystone: ");
//neorv32_uart0_printf ("%6.1f \n", Microseconds);
neorv32_uart0_printf ("%d \n", (int)Microseconds);
neorv32_uart0_printf ("Dhrystones per Second: ");
//neorv32_uart0_printf ("%6.1f \n", Dhrystones_Per_Second);
neorv32_uart0_printf ("%d \n", (int)Dhrystones_Per_Second);
neorv32_uart0_printf ("\n");
*/
}

View file

@ -114,7 +114,7 @@ int main() {
// init primary UART
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// capture all exceptions and give debug info via UART
neorv32_rte_setup();
@ -124,7 +124,7 @@ int main() {
// check if Zfinx extension is implemented at all
if ((NEORV32_SYSINFO.CPU & (1<<SYSINFO_CPU_ZFINX)) == 0) {
neorv32_uart_print("Error! <Zfinx> extension not synthesized!\n");
neorv32_uart0_print("Error! <Zfinx> extension not synthesized!\n");
return 1;
}
@ -134,19 +134,19 @@ int main() {
#warning Program HAS NOT BEEN COMPILED! Use >>make USER_FLAGS+=-DRUN_CHECK clean_all exe<< to compile it.
// inform the user if you are actually executing this
neorv32_uart_printf("ERROR! Program has not been compiled. Use >>make USER_FLAGS+=-DRUN_CHECK clean_all exe<< to compile it.\n");
neorv32_uart0_printf("ERROR! Program has not been compiled. Use >>make USER_FLAGS+=-DRUN_CHECK clean_all exe<< to compile it.\n");
return 1;
#endif
// intro
neorv32_uart_printf("<<< Zfinx extension test >>>\n");
neorv32_uart0_printf("<<< Zfinx extension test >>>\n");
#if (SILENT_MODE != 0)
neorv32_uart_printf("SILENT_MODE enabled (only showing actual errors)\n");
neorv32_uart0_printf("SILENT_MODE enabled (only showing actual errors)\n");
#endif
neorv32_uart_printf("Test cases per instruction: %u\n", (uint32_t)NUM_TEST_CASES);
neorv32_uart_printf("NOTE: The NEORV32 FPU does not support subnormal numbers yet. Subnormal numbers are flushed to zero.\n\n");
neorv32_uart0_printf("Test cases per instruction: %u\n", (uint32_t)NUM_TEST_CASES);
neorv32_uart0_printf("NOTE: The NEORV32 FPU does not support subnormal numbers yet. Subnormal numbers are flushed to zero.\n\n");
// clear exception status word
neorv32_cpu_csr_write(CSR_FFLAGS, 0); // real hardware
@ -158,7 +158,7 @@ int main() {
// ----------------------------------------------------------------------------
#if (RUN_CONV_TESTS != 0)
neorv32_uart_printf("\n#%u: FCVT.S.WU (unsigned integer to float)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FCVT.S.WU (unsigned integer to float)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -170,7 +170,7 @@ int main() {
err_cnt_total += err_cnt;
test_cnt++;
neorv32_uart_printf("\n#%u: FCVT.S.W (signed integer to float)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FCVT.S.W (signed integer to float)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -182,7 +182,7 @@ int main() {
err_cnt_total += err_cnt;
test_cnt++;
neorv32_uart_printf("\n#%u: FCVT.WU.S (float to unsigned integer)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FCVT.WU.S (float to unsigned integer)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -194,7 +194,7 @@ int main() {
err_cnt_total += err_cnt;
test_cnt++;
neorv32_uart_printf("\n#%u: FCVT.W.S (float to signed integer)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FCVT.W.S (float to signed integer)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -213,7 +213,7 @@ int main() {
// ----------------------------------------------------------------------------
#if (RUN_ADDSUB_TESTS != 0)
neorv32_uart_printf("\n#%u: FADD.S (addition)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FADD.S (addition)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -226,7 +226,7 @@ int main() {
err_cnt_total += err_cnt;
test_cnt++;
neorv32_uart_printf("\n#%u: FSUB.S (subtraction)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FSUB.S (subtraction)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -246,7 +246,7 @@ int main() {
// ----------------------------------------------------------------------------
#if (RUN_MUL_TESTS != 0)
neorv32_uart_printf("\n#%u: FMUL.S (multiplication)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FMUL.S (multiplication)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -266,7 +266,7 @@ int main() {
// ----------------------------------------------------------------------------
#if (RUN_MINMAX_TESTS != 0)
neorv32_uart_printf("\n#%u: FMIN.S (select minimum)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FMIN.S (select minimum)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -279,7 +279,7 @@ int main() {
err_cnt_total += err_cnt;
test_cnt++;
neorv32_uart_printf("\n#%u: FMAX.S (select maximum)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FMAX.S (select maximum)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -299,7 +299,7 @@ int main() {
// ----------------------------------------------------------------------------
#if (RUN_COMPARE_TESTS != 0)
neorv32_uart_printf("\n#%u: FEQ.S (compare if equal)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FEQ.S (compare if equal)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -312,7 +312,7 @@ int main() {
err_cnt_total += err_cnt;
test_cnt++;
neorv32_uart_printf("\n#%u: FLT.S (compare if less-than)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FLT.S (compare if less-than)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -325,7 +325,7 @@ int main() {
err_cnt_total += err_cnt;
test_cnt++;
neorv32_uart_printf("\n#%u: FLE.S (compare if less-than-or-equal)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FLE.S (compare if less-than-or-equal)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -345,7 +345,7 @@ int main() {
// ----------------------------------------------------------------------------
#if (RUN_SGNINJ_TESTS != 0)
neorv32_uart_printf("\n#%u: FSGNJ.S (sign-injection)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FSGNJ.S (sign-injection)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -358,7 +358,7 @@ int main() {
err_cnt_total += err_cnt;
test_cnt++;
neorv32_uart_printf("\n#%u: FSGNJN.S (sign-injection NOT)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FSGNJN.S (sign-injection NOT)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -371,7 +371,7 @@ int main() {
err_cnt_total += err_cnt;
test_cnt++;
neorv32_uart_printf("\n#%u: FSGNJX.S (sign-injection XOR)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FSGNJX.S (sign-injection XOR)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -391,7 +391,7 @@ int main() {
// ----------------------------------------------------------------------------
#if (RUN_CLASSIFY_TESTS != 0)
neorv32_uart_printf("\n#%u: FCLASS.S (classify)...\n", test_cnt);
neorv32_uart0_printf("\n#%u: FCLASS.S (classify)...\n", test_cnt);
err_cnt = 0;
for (i=0;i<(uint32_t)NUM_TEST_CASES; i++) {
opa.binary_value = get_test_vector();
@ -410,82 +410,82 @@ int main() {
// ----------------------------------------------------------------------------
#if (RUN_UNAVAIL_TESTS != 0)
neorv32_uart_printf("\n# unsupported FDIV.S (division) [illegal instruction]...\n");
neorv32_uart0_printf("\n# unsupported FDIV.S (division) [illegal instruction]...\n");
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
opa.binary_value = get_test_vector();
opb.binary_value = get_test_vector();
riscv_intrinsic_fdivs(opa.float_value, opb.float_value);
if (neorv32_cpu_csr_read(CSR_MCAUSE) != TRAP_CODE_I_ILLEGAL) {
neorv32_uart_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
err_cnt_total++;
}
else {
neorv32_uart_printf("%c[1m[ok]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[ok]%c[0m\n", 27, 27);
}
neorv32_uart_printf("\n# unsupported FSQRT.S (square root) [illegal instruction]...\n");
neorv32_uart0_printf("\n# unsupported FSQRT.S (square root) [illegal instruction]...\n");
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
opa.binary_value = get_test_vector();
opb.binary_value = get_test_vector();
riscv_intrinsic_fsqrts(opa.float_value);
if (neorv32_cpu_csr_read(CSR_MCAUSE) != TRAP_CODE_I_ILLEGAL) {
neorv32_uart_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
err_cnt_total++;
}
else {
neorv32_uart_printf("%c[1m[ok]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[ok]%c[0m\n", 27, 27);
}
neorv32_uart_printf("\n# unsupported FMADD.S (fused multiply-add) [illegal instruction]...\n");
neorv32_uart0_printf("\n# unsupported FMADD.S (fused multiply-add) [illegal instruction]...\n");
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
opa.binary_value = get_test_vector();
opb.binary_value = get_test_vector();
riscv_intrinsic_fmadds(opa.float_value, opb.float_value, -opa.float_value);
if (neorv32_cpu_csr_read(CSR_MCAUSE) != TRAP_CODE_I_ILLEGAL) {
neorv32_uart_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
err_cnt_total++;
}
else {
neorv32_uart_printf("%c[1m[ok]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[ok]%c[0m\n", 27, 27);
}
neorv32_uart_printf("\n# unsupported FMSUB.S (fused multiply-sub) [illegal instruction]...\n");
neorv32_uart0_printf("\n# unsupported FMSUB.S (fused multiply-sub) [illegal instruction]...\n");
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
opa.binary_value = get_test_vector();
opb.binary_value = get_test_vector();
riscv_intrinsic_fmsubs(opa.float_value, opb.float_value, -opa.float_value);
if (neorv32_cpu_csr_read(CSR_MCAUSE) != TRAP_CODE_I_ILLEGAL) {
neorv32_uart_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
err_cnt_total++;
}
else {
neorv32_uart_printf("%c[1m[ok]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[ok]%c[0m\n", 27, 27);
}
neorv32_uart_printf("\n# unsupported FNMSUB.S (fused negated multiply-sub) [illegal instruction]...\n");
neorv32_uart0_printf("\n# unsupported FNMSUB.S (fused negated multiply-sub) [illegal instruction]...\n");
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
opa.binary_value = get_test_vector();
opb.binary_value = get_test_vector();
riscv_intrinsic_fnmadds(opa.float_value, opb.float_value, -opa.float_value);
if (neorv32_cpu_csr_read(CSR_MCAUSE) != TRAP_CODE_I_ILLEGAL) {
neorv32_uart_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
err_cnt_total++;
}
else {
neorv32_uart_printf("%c[1m[ok]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[ok]%c[0m\n", 27, 27);
}
neorv32_uart_printf("\n# unsupported FNMADD.S (fused negated multiply-add) [illegal instruction]...\n");
neorv32_uart0_printf("\n# unsupported FNMADD.S (fused negated multiply-add) [illegal instruction]...\n");
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
opa.binary_value = get_test_vector();
opb.binary_value = get_test_vector();
riscv_intrinsic_fnmadds(opa.float_value, opb.float_value, -opa.float_value);
if (neorv32_cpu_csr_read(CSR_MCAUSE) != TRAP_CODE_I_ILLEGAL) {
neorv32_uart_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
err_cnt_total++;
}
else {
neorv32_uart_printf("%c[1m[ok]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[ok]%c[0m\n", 27, 27);
}
#endif
@ -499,11 +499,11 @@ int main() {
uint32_t time_start, time_sw, time_hw;
const uint32_t num_runs = 4096;
neorv32_uart_printf("\nAverage execution time tests (%u runs)\n", num_runs);
neorv32_uart0_printf("\nAverage execution time tests (%u runs)\n", num_runs);
// signed integer to float
neorv32_uart_printf("FCVT.S.W: ");
neorv32_uart0_printf("FCVT.S.W: ");
time_sw = 0;
time_hw = 0;
err_cnt = 0;
@ -531,16 +531,16 @@ int main() {
}
if (err_cnt == 0) {
neorv32_uart_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
neorv32_uart0_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
}
else {
neorv32_uart_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
err_cnt_total++;
}
// float to signed integer
neorv32_uart_printf("FCVT.W.S: ");
neorv32_uart0_printf("FCVT.W.S: ");
time_sw = 0;
time_hw = 0;
err_cnt = 0;
@ -568,16 +568,16 @@ int main() {
}
if (err_cnt == 0) {
neorv32_uart_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
neorv32_uart0_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
}
else {
neorv32_uart_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
err_cnt_total++;
}
// addition
neorv32_uart_printf("FADD.S: ");
neorv32_uart0_printf("FADD.S: ");
time_sw = 0;
time_hw = 0;
err_cnt = 0;
@ -606,16 +606,16 @@ int main() {
}
if (err_cnt == 0) {
neorv32_uart_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
neorv32_uart0_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
}
else {
neorv32_uart_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
err_cnt_total++;
}
// subtraction
neorv32_uart_printf("FSUB.S: ");
neorv32_uart0_printf("FSUB.S: ");
time_sw = 0;
time_hw = 0;
err_cnt = 0;
@ -644,16 +644,16 @@ int main() {
}
if (err_cnt == 0) {
neorv32_uart_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
neorv32_uart0_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
}
else {
neorv32_uart_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
err_cnt_total++;
}
// multiplication
neorv32_uart_printf("FMUL.S: ");
neorv32_uart0_printf("FMUL.S: ");
time_sw = 0;
time_hw = 0;
err_cnt = 0;
@ -682,16 +682,16 @@ int main() {
}
if (err_cnt == 0) {
neorv32_uart_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
neorv32_uart0_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
}
else {
neorv32_uart_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
err_cnt_total++;
}
// Max
neorv32_uart_printf("FMAX.S: ");
neorv32_uart0_printf("FMAX.S: ");
time_sw = 0;
time_hw = 0;
err_cnt = 0;
@ -720,16 +720,16 @@ int main() {
}
if (err_cnt == 0) {
neorv32_uart_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
neorv32_uart0_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
}
else {
neorv32_uart_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
err_cnt_total++;
}
// Comparison
neorv32_uart_printf("FLE.S: ");
neorv32_uart0_printf("FLE.S: ");
time_sw = 0;
time_hw = 0;
err_cnt = 0;
@ -758,16 +758,16 @@ int main() {
}
if (err_cnt == 0) {
neorv32_uart_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
neorv32_uart0_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
}
else {
neorv32_uart_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
err_cnt_total++;
}
// Sign-injection
neorv32_uart_printf("FSGNJX.S: ");
neorv32_uart0_printf("FSGNJX.S: ");
time_sw = 0;
time_hw = 0;
err_cnt = 0;
@ -796,10 +796,10 @@ int main() {
}
if (err_cnt == 0) {
neorv32_uart_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
neorv32_uart0_printf("cycles[SW] = %u vs. cycles[HW] = %u\n", time_sw/num_runs, time_hw/num_runs);
}
else {
neorv32_uart_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[TEST FAILED!]%c[0m\n", 27, 27);
err_cnt_total++;
}
#endif
@ -810,12 +810,12 @@ int main() {
// ----------------------------------------------------------------------------
if (err_cnt_total != 0) {
neorv32_uart_printf("\n%c[1m[ZFINX EXTENSION VERIFICATION FAILED!]%c[0m\n", 27, 27);
neorv32_uart_printf("%u errors in %u test cases\n", err_cnt_total, test_cnt*(uint32_t)NUM_TEST_CASES);
neorv32_uart0_printf("\n%c[1m[ZFINX EXTENSION VERIFICATION FAILED!]%c[0m\n", 27, 27);
neorv32_uart0_printf("%u errors in %u test cases\n", err_cnt_total, test_cnt*(uint32_t)NUM_TEST_CASES);
return 1;
}
else {
neorv32_uart_printf("\n%c[1m[Zfinx extension verification successful!]%c[0m\n", 27, 27);
neorv32_uart0_printf("\n%c[1m[Zfinx extension verification successful!]%c[0m\n", 27, 27);
return 0;
}
@ -884,19 +884,19 @@ uint32_t xorshift32(void) {
uint32_t verify_result(uint32_t num, uint32_t opa, uint32_t opb, uint32_t ref, uint32_t res) {
#if (SILENT_MODE == 0)
neorv32_uart_printf("%u: opa = 0x%x, opb = 0x%x : ref[SW] = 0x%x vs. res[HW] = 0x%x ", num, opa, opb, ref, res);
neorv32_uart0_printf("%u: opa = 0x%x, opb = 0x%x : ref[SW] = 0x%x vs. res[HW] = 0x%x ", num, opa, opb, ref, res);
#endif
if (ref != res) {
#if (SILENT_MODE != 0)
neorv32_uart_printf("%u: opa = 0x%x, opb = 0x%x : ref[SW] = 0x%x vs. res[HW] = 0x%x ", num, opa, opb, ref, res);
neorv32_uart0_printf("%u: opa = 0x%x, opb = 0x%x : ref[SW] = 0x%x vs. res[HW] = 0x%x ", num, opa, opb, ref, res);
#endif
neorv32_uart_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
return 1;
}
else {
#if (SILENT_MODE == 0)
neorv32_uart_printf("%c[1m[ok]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[ok]%c[0m\n", 27, 27);
#endif
return 0;
}
@ -910,12 +910,12 @@ uint32_t verify_result(uint32_t num, uint32_t opa, uint32_t opb, uint32_t ref, u
**************************************************************************/
void print_report(uint32_t num_err) {
neorv32_uart_printf("Errors: %u/%u ", num_err, (uint32_t)NUM_TEST_CASES);
neorv32_uart0_printf("Errors: %u/%u ", num_err, (uint32_t)NUM_TEST_CASES);
if (num_err == 0) {
neorv32_uart_printf("%c[1m[ok]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[ok]%c[0m\n", 27, 27);
}
else {
neorv32_uart_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
neorv32_uart0_printf("%c[1m[FAILED]%c[0m\n", 27, 27);
}
}

View file

@ -87,7 +87,7 @@ uint32_t xorshift32(void);
int main(void) {
// check if UART unit is implemented at all
if (neorv32_uart_available() == 0) {
if (neorv32_uart0_available() == 0) {
return 1;
}
@ -98,7 +98,7 @@ int main(void) {
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
@ -118,22 +118,22 @@ int main(void) {
clear_universe(1);
// intro
neorv32_uart_printf("\n\n<<< Conways's Game of Life >>>\n\n");
neorv32_uart_printf("This program requires a terminal resolution of at least %ux%u characters.\n", NUM_CELLS_X+2, NUM_CELLS_Y+3);
neorv32_uart_printf("Press any key to start a random-initialized torus-style universe of %ux%u cells.\n", NUM_CELLS_X, NUM_CELLS_Y);
neorv32_uart_printf("You can pause/restart the simulation by pressing any key.\n");
neorv32_uart0_printf("\n\n<<< Conways's Game of Life >>>\n\n");
neorv32_uart0_printf("This program requires a terminal resolution of at least %ux%u characters.\n", NUM_CELLS_X+2, NUM_CELLS_Y+3);
neorv32_uart0_printf("Press any key to start a random-initialized torus-style universe of %ux%u cells.\n", NUM_CELLS_X, NUM_CELLS_Y);
neorv32_uart0_printf("You can pause/restart the simulation by pressing any key.\n");
// check if TRNG was synthesized
if (neorv32_trng_available()) {
neorv32_uart_printf("\nTRNG detected. Using TRNG for universe initialization.\n");
neorv32_uart0_printf("\nTRNG detected. Using TRNG for universe initialization.\n");
neorv32_trng_enable();
trng_available = 1;
}
// randomize until key pressed
while (neorv32_uart_char_received() == 0) {
while (neorv32_uart0_char_received() == 0) {
xorshift32();
}
@ -145,7 +145,7 @@ int main(void) {
while (1) {
int err = neorv32_trng_get(&trng_data);
if (err) {
neorv32_uart_printf("TRNG error (%i)! Restarting TRNG...\n", err);
neorv32_uart0_printf("TRNG error (%i)! Restarting TRNG...\n", err);
continue;
}
else {
@ -164,15 +164,15 @@ int main(void) {
while(1) {
// user abort?
if (neorv32_uart_char_received()) {
neorv32_uart_printf("\nRestart (y/n)?");
if (neorv32_uart_getc() == 'y') {
if (neorv32_uart0_char_received()) {
neorv32_uart0_printf("\nRestart (y/n)?");
if (neorv32_uart0_getc() == 'y') {
break;
}
}
// print generation, population count and the current universe
neorv32_uart_printf("\n\nGeneration %u: %u/%u living cells\n", (uint32_t)generation, (uint32_t)pop_count(u), NUM_CELLS_X*NUM_CELLS_Y);
neorv32_uart0_printf("\n\nGeneration %u: %u/%u living cells\n", (uint32_t)generation, (uint32_t)pop_count(u), NUM_CELLS_X*NUM_CELLS_Y);
print_universe(u);
// compute next generation
@ -216,35 +216,35 @@ void print_universe(int u){
int16_t x, y;
neorv32_uart_putc('+');
neorv32_uart0_putc('+');
for (x=0; x<NUM_CELLS_X; x++) {
neorv32_uart_putc('-');
neorv32_uart0_putc('-');
}
neorv32_uart_putc('+');
neorv32_uart_putc('\r');
neorv32_uart_putc('\n');
neorv32_uart0_putc('+');
neorv32_uart0_putc('\r');
neorv32_uart0_putc('\n');
for (y=0; y<NUM_CELLS_Y; y++) {
neorv32_uart_putc('|');
neorv32_uart0_putc('|');
for (x=0; x<NUM_CELLS_X; x++) {
if (get_cell(u, x, y))
neorv32_uart_putc((char)CELL_ALIVE);
neorv32_uart0_putc((char)CELL_ALIVE);
else
neorv32_uart_putc((char)CELL_DEAD);
neorv32_uart0_putc((char)CELL_DEAD);
}
// end of line
neorv32_uart_putc('|');
neorv32_uart_putc('\r');
neorv32_uart_putc('\n');
neorv32_uart0_putc('|');
neorv32_uart0_putc('\r');
neorv32_uart0_putc('\n');
}
neorv32_uart_putc('+');
neorv32_uart0_putc('+');
for (x=0; x<NUM_CELLS_X; x++) {
neorv32_uart_putc('-');
neorv32_uart0_putc('-');
}
neorv32_uart_putc('+');
neorv32_uart0_putc('+');
}

View file

@ -66,7 +66,7 @@ int main() {
neorv32_rte_setup();
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
@ -75,7 +75,7 @@ int main() {
neorv32_rte_print_logo();
// say hello
neorv32_uart_print("Hello world! :)\n");
neorv32_uart0_print("Hello world! :)\n");
return 0;

View file

@ -73,7 +73,7 @@ int main() {
int length = 0;
// check if UART unit is implemented at all
if (neorv32_uart_available() == 0) {
if (neorv32_uart0_available() == 0) {
return 1;
}
@ -85,30 +85,30 @@ int main() {
neorv32_cpu_dint();
// init UART at default baud rate, no parity bits, ho hw flow control
neorv32_uart_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
neorv32_uart0_setup(BAUD_RATE, PARITY_NONE, FLOW_CONTROL_NONE);
// check available hardware extensions and compare with compiler flags
neorv32_rte_check_isa(0); // silent = 0 -> show message if isa mismatch
// intro
neorv32_uart_printf("\n--- Hex Viewer ---\n\n");
neorv32_uart0_printf("\n--- Hex Viewer ---\n\n");
// info
neorv32_uart_printf("This program allows to read/write/dump memory locations by hand.\n"
neorv32_uart0_printf("This program allows to read/write/dump memory locations by hand.\n"
"Type 'help' to see the help menu.\n\n");
// Main menu
for (;;) {
neorv32_uart_printf("HEX_VIEWER:> ");
length = neorv32_uart_scan(buffer, 8, 1);
neorv32_uart_printf("\n");
neorv32_uart0_printf("HEX_VIEWER:> ");
length = neorv32_uart0_scan(buffer, 8, 1);
neorv32_uart0_printf("\n");
if (!length) // nothing to be done
continue;
// decode input and execute command
if (!strcmp(buffer, "help")) {
neorv32_uart_printf("Available commands:\n"
neorv32_uart0_printf("Available commands:\n"
" help - show this text\n"
" read - read single word from address\n"
" write - write single word to address\n"
@ -133,7 +133,7 @@ int main() {
}
else {
neorv32_uart_printf("Invalid command. Type 'help' to see all commands.\n");
neorv32_uart0_printf("Invalid command. Type 'help' to see all commands.\n");
}
}
@ -149,12 +149,12 @@ void read_memory(void) {
char terminal_buffer[16];
// enter address
neorv32_uart_printf("Enter address (8 hex chars): 0x");
neorv32_uart_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
neorv32_uart0_printf("Enter address (8 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
register uint32_t mem_address = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
// perform read access
neorv32_uart_printf("\n[0x%x] = ", mem_address);
neorv32_uart0_printf("\n[0x%x] = ", mem_address);
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
@ -162,10 +162,10 @@ void read_memory(void) {
// show memory content if there was no exception
if (neorv32_cpu_csr_read(CSR_MCAUSE) == 0) {
neorv32_uart_printf("0x%x", mem_data);
neorv32_uart0_printf("0x%x", mem_data);
}
neorv32_uart_printf("\n");
neorv32_uart0_printf("\n");
}
@ -177,17 +177,17 @@ void write_memory(void) {
char terminal_buffer[16];
// enter address
neorv32_uart_printf("Enter address (8 hex chars): 0x");
neorv32_uart_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
neorv32_uart0_printf("Enter address (8 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
uint32_t mem_address = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
// enter data
neorv32_uart_printf("\nEnter data (8 hex chars): 0x");
neorv32_uart_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
neorv32_uart0_printf("\nEnter data (8 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
uint32_t mem_data = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
// perform write access
neorv32_uart_printf("\n[0x%x] = ", mem_address);
neorv32_uart0_printf("\n[0x%x] = ", mem_address);
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
@ -195,10 +195,10 @@ void write_memory(void) {
// show memory content if there was no exception
if (neorv32_cpu_csr_read(CSR_MCAUSE) == 0) {
neorv32_uart_printf("0x%x", mem_data);
neorv32_uart0_printf("0x%x", mem_data);
}
neorv32_uart_printf("\n");
neorv32_uart0_printf("\n");
}
@ -213,30 +213,30 @@ void atomic_cas(void) {
if ((neorv32_cpu_csr_read(CSR_MISA) & (1<<CSR_MISA_A)) != 0) {
// enter memory address
neorv32_uart_printf("Enter memory address (8 hex chars): 0x");
neorv32_uart_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
neorv32_uart0_printf("Enter memory address (8 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
mem_address = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
// enter desired value
neorv32_uart_printf("\nEnter new value @0x%x (8 hex chars): 0x", mem_address);
neorv32_uart_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
neorv32_uart0_printf("\nEnter new value @0x%x (8 hex chars): 0x", mem_address);
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
wdata = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
rdata = neorv32_cpu_load_reservate_word(mem_address); // make reservation
status = neorv32_cpu_store_conditional(mem_address, wdata);
// status
neorv32_uart_printf("\nOld data: 0x%x\n", rdata);
neorv32_uart0_printf("\nOld data: 0x%x\n", rdata);
if (status == 0) {
neorv32_uart_printf("Atomic access successful!\n");
neorv32_uart_printf("New data: 0x%x\n", neorv32_cpu_load_unsigned_word(mem_address));
neorv32_uart0_printf("Atomic access successful!\n");
neorv32_uart0_printf("New data: 0x%x\n", neorv32_cpu_load_unsigned_word(mem_address));
}
else {
neorv32_uart_printf("Atomic access failed!\n");
neorv32_uart0_printf("Atomic access failed!\n");
}
}
else {
neorv32_uart_printf("Atomic operations not implemented/enabled!\n");
neorv32_uart0_printf("Atomic operations not implemented/enabled!\n");
}
}
@ -249,19 +249,19 @@ void dump_memory(void) {
char terminal_buffer[16];
// enter base address
neorv32_uart_printf("Enter base address (8 hex chars): 0x");
neorv32_uart_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
neorv32_uart0_printf("Enter base address (8 hex chars): 0x");
neorv32_uart0_scan(terminal_buffer, 8+1, 1); // 8 hex chars for address plus '\0'
uint32_t mem_address = (uint32_t)hexstr_to_uint(terminal_buffer, strlen(terminal_buffer));
neorv32_uart_printf("\nPress key to start dumping. Press any key to abort.\n");
neorv32_uart0_printf("\nPress key to start dumping. Press any key to abort.\n");
neorv32_uart_getc(); // wait for key
neorv32_uart0_getc(); // wait for key
// perform read accesses
uint32_t mem_data = 0;
while(neorv32_uart_char_received() == 0) {
while(neorv32_uart0_char_received() == 0) {
neorv32_uart_printf("[0x%x] = ", mem_address);
neorv32_uart0_printf("[0x%x] = ", mem_address);
neorv32_cpu_csr_write(CSR_MCAUSE, 0);
@ -269,7 +269,7 @@ void dump_memory(void) {
// show memory content if there was no exception
if (neorv32_cpu_csr_read(CSR_MCAUSE) == 0) {
neorv32_uart_printf("0x%x\n", mem_data);
neorv32_uart0_printf("0x%x\n", mem_data);
}
else {
break;
@ -278,8 +278,8 @@ void dump_memory(void) {
mem_address = mem_address + 4;
}
neorv32_uart_char_received_get(); // clear UART rx buffer
neorv32_uart_printf("\n");
neorv32_uart0_char_received_get(); // clear UART rx buffer
neorv32_uart0_printf("\n");
}

View file

@ -49,7 +49,7 @@
// Libs required by functions
#include <stdarg.h>
// compatibility wrappers (mapping to primary UART -> UART0)
// compatibility wrappers (mapping to primary UART -> UART0) (OBSOLETE, do not use for new designs!)
int neorv32_uart_available(void);
void neorv32_uart_setup(uint32_t baudrate, uint8_t parity, uint8_t flow_con);
void neorv32_uart_disable(void);

View file

@ -205,7 +205,7 @@ static void __neorv32_rte_debug_exc_handler(void) {
char tmp;
// intro
neorv32_uart_print("<RTE> ");
neorv32_uart0_print("<RTE> ");
// cause
register uint32_t trap_cause = neorv32_cpu_csr_read(CSR_MCAUSE);
@ -217,19 +217,19 @@ static void __neorv32_rte_debug_exc_handler(void) {
tmp = '0' + tmp;
}
switch (trap_cause) {
case TRAP_CODE_I_MISALIGNED: neorv32_uart_print("Instruction address misaligned"); break;
case TRAP_CODE_I_ACCESS: neorv32_uart_print("Instruction access fault"); break;
case TRAP_CODE_I_ILLEGAL: neorv32_uart_print("Illegal instruction"); break;
case TRAP_CODE_BREAKPOINT: neorv32_uart_print("Breakpoint"); break;
case TRAP_CODE_L_MISALIGNED: neorv32_uart_print("Load address misaligned"); break;
case TRAP_CODE_L_ACCESS: neorv32_uart_print("Load access fault"); break;
case TRAP_CODE_S_MISALIGNED: neorv32_uart_print("Store address misaligned"); break;
case TRAP_CODE_S_ACCESS: neorv32_uart_print("Store access fault"); break;
case TRAP_CODE_UENV_CALL: neorv32_uart_print("Environment call from U-mode"); break;
case TRAP_CODE_MENV_CALL: neorv32_uart_print("Environment call from M-mode"); break;
case TRAP_CODE_MSI: neorv32_uart_print("Machine software interrupt"); break;
case TRAP_CODE_MTI: neorv32_uart_print("Machine timer interrupt"); break;
case TRAP_CODE_MEI: neorv32_uart_print("Machine external interrupt"); break;
case TRAP_CODE_I_MISALIGNED: neorv32_uart0_print("Instruction address misaligned"); break;
case TRAP_CODE_I_ACCESS: neorv32_uart0_print("Instruction access fault"); break;
case TRAP_CODE_I_ILLEGAL: neorv32_uart0_print("Illegal instruction"); break;
case TRAP_CODE_BREAKPOINT: neorv32_uart0_print("Breakpoint"); break;
case TRAP_CODE_L_MISALIGNED: neorv32_uart0_print("Load address misaligned"); break;
case TRAP_CODE_L_ACCESS: neorv32_uart0_print("Load access fault"); break;
case TRAP_CODE_S_MISALIGNED: neorv32_uart0_print("Store address misaligned"); break;
case TRAP_CODE_S_ACCESS: neorv32_uart0_print("Store access fault"); break;
case TRAP_CODE_UENV_CALL: neorv32_uart0_print("Environment call from U-mode"); break;
case TRAP_CODE_MENV_CALL: neorv32_uart0_print("Environment call from M-mode"); break;
case TRAP_CODE_MSI: neorv32_uart0_print("Machine software interrupt"); break;
case TRAP_CODE_MTI: neorv32_uart0_print("Machine timer interrupt"); break;
case TRAP_CODE_MEI: neorv32_uart0_print("Machine external interrupt"); break;
case TRAP_CODE_FIRQ_0:
case TRAP_CODE_FIRQ_1:
case TRAP_CODE_FIRQ_2:
@ -245,18 +245,18 @@ static void __neorv32_rte_debug_exc_handler(void) {
case TRAP_CODE_FIRQ_12:
case TRAP_CODE_FIRQ_13:
case TRAP_CODE_FIRQ_14:
case TRAP_CODE_FIRQ_15: neorv32_uart_print("Fast interrupt "); neorv32_uart_putc(tmp); break;
default: neorv32_uart_print("Unknown trap cause: "); __neorv32_rte_print_hex_word(trap_cause); break;
case TRAP_CODE_FIRQ_15: neorv32_uart0_print("Fast interrupt "); neorv32_uart0_putc(tmp); break;
default: neorv32_uart0_print("Unknown trap cause: "); __neorv32_rte_print_hex_word(trap_cause); break;
}
// instruction address
neorv32_uart_print(" @ PC=");
neorv32_uart0_print(" @ PC=");
__neorv32_rte_print_hex_word(neorv32_cpu_csr_read(CSR_MSCRATCH)); // rte core stores actual mepc to mscratch
// additional info
neorv32_uart_print(", MTVAL=");
neorv32_uart0_print(", MTVAL=");
__neorv32_rte_print_hex_word(neorv32_cpu_csr_read(CSR_MTVAL));
neorv32_uart_print(" </RTE>");
neorv32_uart0_print(" </RTE>");
}
@ -273,7 +273,7 @@ void neorv32_rte_print_hw_config(void) {
int i;
char c;
neorv32_uart_printf("\n\n<<< Processor Configuration Overview >>>\n");
neorv32_uart0_printf("\n\n<<< Processor Configuration Overview >>>\n");
// CPU configuration
neorv32_uart0_printf("\n=== << CPU >> ===\n");
@ -630,7 +630,7 @@ void neorv32_rte_print_license(void) {
return; // cannot output anything if UART0 is not implemented
}
neorv32_uart_print(
neorv32_uart0_print(
"\n"
"BSD 3-Clause License\n"
"\n"
@ -736,7 +736,7 @@ int neorv32_rte_check_isa(int silent) {
}
else {
if ((silent == 0) || (neorv32_uart0_available() == 0)) {
neorv32_uart_printf("\nWARNING! SW_ISA (features required) vs HW_ISA (features available) mismatch!\n"
neorv32_uart0_printf("\nWARNING! SW_ISA (features required) vs HW_ISA (features available) mismatch!\n"
"SW_ISA = 0x%x (compiler flags)\n"
"HW_ISA = 0x%x (misa csr)\n\n", misa_sw, misa_hw);
}