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🐛 fix bug in crt0.S interrupt setup (#297)
* 🐛 fixed crt0 IRQ setup
The first thing crt0 has t do is to disable interrupts globally!
* update executable images
due to chnage of crt0.S
* add version 1.6.9.11
* add crt0 IRQ disable to docs
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@ -33,6 +33,7 @@ The version number is globally defined by the `hw_version_c` constant in the mai
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| Date (*dd.mm.yyyy*) | Version | Comment |
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|:----------:|:-------:|:--------|
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| 08.04.2022 | 1.6.9.11 | :bug: fixed bug in interrupt setup of **`crt0` start-up code** [#297](https://github.com/stnolting/neorv32/pull/297) |
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| 08.04.2022 | 1.6.9.10 | rework compressed instruction (`C` ISA extension) de-compressor: :lock: closed further illegal compressed instruction holes; code clean-ups; `mtval` CSR now shows the decompressed 32-bit instruction when executing an illegal compressed instruction; minor RTL code cleanups (removing legacy stuff); [PR #296](https://github.com/stnolting/neorv32/pull/296) |
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| 07.04.2022 | 1.6.9.9 | AND-gate CSR read address: reduces **CPU switching activity** (= dynamic power consumption) and even reduces area costs; [PR #295](https://github.com/stnolting/neorv32/pull/295) |
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| 06.04.2022 | 1.6.9.8 | :bug: fixed instruction decoding collision in CPU `B` extension; :lock: closed further illegal instruction encoding holes; optimized illegal instruction detection logic; [PR #294](https://github.com/stnolting/neorv32/pull/294) |
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@ -445,11 +445,12 @@ and placed right before the actual application code so it gets executed right af
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The `crt0.S` start-up performs the following operations:
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[start=1]
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. Disable interrupts globally by clearing <<_mstatus>>`.mie`.
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. Initialize all integer registers `x1 - x31` (or just `x1 - x15` when using the `E` CPU extension) to a defined value.
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. Initialize the global pointer `gp` and the stack pointer `sp` according to the <<_ram_layout>> provided by the linker script.
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. Initialize all CPU core CSRs and also install a default "dummy" trap handler for _all_ traps. This handler catches all traps
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** All interrupt sources are disabled and all pending interrupts are cleared.
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. Initialize the global pointer `gp` and the stack pointer `sp` according to the <<_ram_layout>> provided by the linker script.
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during the early boot phase.
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. All interrupt sources are disabled and all pending interrupts are cleared.
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. Clear all counter CSRs and stop auto-increment.
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. Clear IO area: Write zero to all memory-mapped registers within the IO region (`iodev` section). If certain devices have not
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been implemented, a bus access fault exception will occur. This exception is captured by the dummy trap handler.
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@ -175,6 +175,13 @@ After the upload, GDB will make the processor jump to the beginning of the uploa
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(by default, this is the beginning of the instruction memory at `0x00000000`) skipping the bootloader
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and halting the CPU right before executing the `blink_led` application.
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[IMPORTANT]
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After gdb has connected to the CPU, it is recommended to disable the CPU's global interrupt flag
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(`mstatus.mie`, = bit #3) to prevent unintended calls of potentially outdated trap handlers. The global
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interrupt flag can be cleared using the following gdb command:
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`set $mstatus = ($mstatus & ~(1<<3))`. Interrupts can be enabled globally again by the following command:
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`set $mstatus = ($mstatus | (1<<3))`.
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:sectnums:
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==== Software Breakpoints
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File diff suppressed because it is too large
Load diff
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@ -11,7 +11,7 @@ use neorv32.neorv32_package.all;
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package neorv32_bootloader_image is
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constant bootloader_init_image : mem32_t := (
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00000000 => x"00000037",
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00000000 => x"30047073",
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00000001 => x"80010117",
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00000002 => x"1f810113",
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00000003 => x"80010197",
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@ -867,7 +867,7 @@ package neorv32_bootloader_image is
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00000853 => x"444c420a",
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00000854 => x"41203a56",
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00000855 => x"20207270",
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00000856 => x"30322036",
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00000856 => x"30322038",
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00000857 => x"480a3232",
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00000858 => x"203a5657",
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00000859 => x"00000020",
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@ -65,7 +65,7 @@ package neorv32_package is
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-- Architecture Constants (do not modify!) ------------------------------------------------
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-- -------------------------------------------------------------------------------------------
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constant data_width_c : natural := 32; -- native data path width - do not change!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01060910"; -- NEORV32 version - no touchy!
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constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01060911"; -- NEORV32 version - no touchy!
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constant archid_c : natural := 19; -- official NEORV32 architecture ID - hands off!
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-- Check if we're inside the Matrix -------------------------------------------------------
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@ -47,8 +47,13 @@ _start:
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// ************************************************************************************************
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// This is the very first instruction that is executed after hardware reset. It ensures that x0 is
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// written at least once - the CPU HW will ensure it is always set to zero on any write access.
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//
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// Furthermore, we have to disable ALL interrupts, which is required if this code is part of a
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// program uploaded by the on-chip debugger (potentionally taking control from the bootloader).
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// We setup a new stack pointer here and WE DO NOT WANT TO trap to an outdated trap handler with
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// a modified stack pointer.
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// ************************************************************************************************
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lui zero, 0 // "dummy" instruction that uses no reg-file input operands at all
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csrrci zero, mstatus, (1<<3) // disable global interrupt flag and write "anything" to x0
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// ************************************************************************************************
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