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[sw/example/floating_point_test/README] added current "FPU limitations"
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# NEORV32 `Zfinx` Floating-Point Extension
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The NEORV32 floating-point unit (FPU) implements the `Zfinx` RISC-V extension. The extensions can be enabled via the `CPU_EXTENSION_RISCV_Zfinx` top configuration generic.
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The RISC-V `Zfinx` single-precision floating-point extensions uses the integer register file `x` instead of the dedicated floating-point `f` register file (which is
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defined by the RISC-V `F` single-precision floating-point extension). Hence, the standard data transfer instructions from the `F` extension are **not** available in `Zfinx`:
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* floating-point load/store operations (`FLW`, `FSW`) and their compressed versions
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* integer register file `x` <-> floating point register file `f` move operations (`FMV.W.X`, `FMV.X.W`)
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:information_source: More information regarding the RISC-V `Zfinx` single-precision floating-point extension can be found in the officail GitHub repo:
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[`github.com/riscv/riscv-zfinx`](https://github.com/riscv/riscv-zfinx).
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@ -14,6 +15,12 @@ defined by the RISC-V `F` single-precision floating-point extension). Hence, the
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Make sure you **do not** use the `f` ISA attribute when compiling applications that use floating-point arithmetic (`-march=rv32i*f*` is **NOT ALLOWED!**).
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### :warning: FPU Limitations
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* The FPU **does not support subnormal numbers** yet. Subnormal FPU inputs and subnormal FPU results are always *flushed to zero*. The *classify* instruction `FCLASS` will never set the "subnormal" mask bits.
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* Rounding mode `ob100` "round to nearest, ties to max magnitude" is not supported yet (this and all invalid rounding mode configurations behave as "round towards zero" (truncation)).
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## Intrinsic Library
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The NEORV32 `Zfinx` floating-point extension can still be used using the provided **intrinsic library**. This library uses "custom" inline assmbly instructions
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The provided test program `main.c` verifies all currently implemented `Zfinx` instructions by checking the functionality against the pure software-based emulation model
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(GCC soft-float library).
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