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fixed links; added PDF icon
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@ -44,6 +44,8 @@ The project is intended to work "out of the box". Just synthesize the test setup
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it to your FPGA board of choice and start playing with the NEORV32. If you do not want to [compile the GCC toolchain](https://github.com/riscv/riscv-gnu-toolchain)
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by yourself, you can also download [pre-compiled toolchain](https://github.com/stnolting/riscv_gcc_prebuilt) for Linux.
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For more information take a look a the [ NEORV32 datasheet](https://raw.githubusercontent.com/stnolting/neorv32/master/docs/NEORV32.pdf).
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### Design Principles
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@ -331,7 +333,8 @@ end neorv32_top;
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## Getting Started
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This overview is just a short excerpt from the *Let's Get It Started* section of the NEORV32 documentary:
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[NEORV32 Datasheet](https://raw.githubusercontent.com/stnolting/neorv32/master/docs/neorv32.pdf)
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[ NEORV32 datasheet](https://raw.githubusercontent.com/stnolting/neorv32/master/docs/NEORV32.pdf)
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### Building the Toolchain
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