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[demo_dual_core] code updates

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stnolting 2025-01-10 08:47:35 +01:00
parent 86ca786e88
commit ff82994e8f
2 changed files with 11 additions and 26 deletions
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33
sw/example/demo_dual_core/main.c
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@ -49,7 +49,7 @@ int main(void) {
// check hardware/software configuration
if (NEORV32_SYSINFO->MISC[SYSINFO_MISC_HART] != 2) { // two cores available?
if (neorv32_sysinfo_get_numcores() < 2) { // two cores available?
neorv32_uart0_printf("[ERROR] dual-core option not enabled!\n");
return -1;
}
@ -62,7 +62,7 @@ int main(void) {
return -1;
}
#ifndef __riscv_atomic
#warning "Application has to be compiled with 'A' ISA extension!"
#warning "Application has to be compiled with RISC-V 'A' ISA extension!"
neorv32_uart0_printf("[ERROR] Application has to be compiled with 'A' ISA extension!\n");
return -1;
#endif
@ -86,12 +86,11 @@ int main(void) {
neorv32_uart0_printf("Launching core1...\n");
// Launch execution of core 1. Arguments:
// 1st: Hart ID of the core that we want to launch.
// 2nd: "main_core1" is the entry point for the core and we provide a total of 2kB of stack for it.
// 3rd: Pointer to the core's stack memory array.
// 4th: Size of the core's stack memory array.
// 1st: "main_core1" is the entry point for the core.
// 2nd: Pointer to the core's stack memory array.
// 3rd: Size of the core's stack memory array.
int smp_launch_rc = neorv32_smp_launch(1, main_core1, (uint8_t*)core1_stack, sizeof(core1_stack));
int smp_launch_rc = neorv32_smp_launch(main_core1, (uint8_t*)core1_stack, sizeof(core1_stack));
// Here we are using a statically allocated array as stack memory. Alternatively, malloc
// could be used (it is recommend to align the stack memory on a 16-byte boundary):
@ -100,7 +99,7 @@ int main(void) {
// check if launching was successful
if (smp_launch_rc) {
neorv32_uart0_printf("[ERROR] Launching core1 failed (%d)!\n", smp_launch_rc);
return 1;
return -1;
}
@ -116,13 +115,6 @@ int main(void) {
spin_unlock();
// Test core0 RTE: raise an environment call exception
// As the RTE's debug handler is using UART0 we should use the spinlock here, too
spin_lock();
asm volatile("ecall");
spin_unlock();
// enable machine-level interrupts and wait in sleep mode for the MTIMER interrupt
neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE);
while (1) {
@ -156,13 +148,6 @@ void main_core1(void) {
neorv32_cpu_csr_set(CSR_MIE, 1 << CSR_MIE_MTIE); // enable MTIMER interrupt source
// Test core1 RTE: raise an environment call exception
// As the RTE's debug handler is using UART0 we should use the spinlock here, too
spin_lock();
asm volatile("ecall");
spin_unlock();
// enable machine-level interrupts and wait in sleep mode
neorv32_cpu_csr_set(CSR_MSTATUS, 1 << CSR_MSTATUS_MIE);
while (1) {
@ -172,7 +157,7 @@ void main_core1(void) {
/**********************************************************************//**
* CLINT machine timer interrupt handler for core0.
* CLINT machine timer interrupt handler for core 0.
**************************************************************************/
void clint_mtime_handler_core0(void) {
@ -187,7 +172,7 @@ void clint_mtime_handler_core0(void) {
/**********************************************************************//**
* CLINT machine timer interrupt handler for core1.
* CLINT machine timer interrupt handler for core 1.
**************************************************************************/
void clint_mtime_handler_core1(void) {

4
sw/example/demo_dual_core/spinlock.c
View file

@ -1,6 +1,6 @@
/**
* @file spinlock.c
* @brief Single simple spin-lock based on atomic memory operations.
* @brief Single simple spinlock based on atomic memory operations.
*/
#include <neorv32.h>
@ -14,7 +14,7 @@ static volatile uint32_t __spin_locked = 0;
/**********************************************************************//**
* Spinlock: set lock.
*
* @warning This function is blocking until the lock is acquired.
* @warning This function is blocking until the lock is acquired and set.
**************************************************************************/
void spin_lock(void) {