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8456 commits 5 branches 76 tags 278 MiB
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20 commits

Author SHA1 Message Date
stnolting
f5bfbd9949 [image_gen] add "_c" suffix to VHDL constants 2024-12-23 14:17:14 +01:00
stnolting
f73501876d [image_gen] add image size as VHDL constant 2024-12-22 15:13:51 +01:00
stnolting
5b41edd253 [image_gen] minor optimization 2024-11-02 21:15:53 +01:00
stnolting
542e56b80a [image_gen] emit full VHDL packages as images 2024-10-31 22:29:13 +01:00
stnolting
36717c95d7 [image_gen] add warning: image is not a mult. of 4 2024-10-03 22:09:55 +02:00
stnolting
0ca6454b61 [image_gen] add support for mif file type 2024-07-11 20:45:40 +02:00
stnolting
1724eaeb8c [sw/image_gen] minor cleanups 2024-06-11 20:26:47 +02:00
stnolting
91d97f4903 [image_gen] add COE and MEM file output 2024-05-16 18:03:08 +02:00
stnolting
d6167b90d6 [sw] clean-up image generator 2023-12-11 21:23:32 +01:00
stnolting
ec62beb1e9 add "raw" targets 
-> generate RAW (no header) hex or bin files
 2022-07-08 12:34:16 +02:00
stnolting
3e6a0982cc [VHDL images] reduce image file size 
Remove whitespaces and explicit indices
 2022-06-09 10:28:37 +02:00
stnolting
091b86d5e4 [sw/image_gen] minor comment edits 2022-06-06 14:28:10 +02:00
Andreas Kaeberlein
779cac8568 move bootload/application image prototype definition to neorv32_package.vhd 2022-06-06 12:40:55 +02:00
Andreas Kaeberlein
84f9007321 image_gen: restore original 'neorv32_boot_rom.vhd' generation mimic 2022-06-06 11:25:21 +02:00
Andreas Kaeberlein
0a30e110af generates only package body of 'neorv32_application_image' and 'neorv32_bootloader_image' 2022-06-05 10:21:14 +02:00
Andreas Kaeberlein
2f48fa616e divide neorv32_application_image.vhd into package and body 
-> neorv32_application_image.vhd => package
-> neorv32_application_image_mem.vhd => body
-> enables in recompile case the exchange of the FW without recompiling the rest of processors architecture
 2022-06-04 12:45:36 +02:00
stnolting
62639cbb6c add built time output to image generator 
Image generator now adds the built time (time + date) to the VHDL image files. Replaced tab by whitespaces.
 2022-05-31 15:13:45 +02:00
stnolting
67970b0b4e update image generator 
Generator now adds the content of the MARCH varible (CPU ISA extensions) to the generated VHDL image files if MARCH is defined by the user during compilation
 2022-05-31 14:50:06 +02:00
stnolting
7dcbfce188 minor fix 2022-04-19 11:44:11 +02:00
stnolting
522bd3cef8 [sw/image_gen] renamed *.cpp -> *.c 2021-08-16 18:29:29 +02:00
Renamed from sw/image_gen/image_gen.cpp (Browse further)