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607 B
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13 lines
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607 B
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:author: The NEORV32 Community and Stephan Nolting
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:email: stnolting@gmail.com
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:keywords: neorv32, risc-v, riscv, rv32, fpga, soft-core, vhdl, microcontroller, cpu, soc, processor, gcc, openocd, gdb, verilog, rtl, asip, asic, safety
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:description: A size-optimized, customizable and highly extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
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:revnumber: v1.10.6
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:doctype: book
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:sectnums:
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:stem:
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:reproducible:
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:listing-caption: Listing
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:toclevels: 3
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:title-logo-image: neorv32_logo_riscv.png[pdfwidth=6.25in,align=center]
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:favicon: img/icon.png |