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43 lines
1.7 KiB
Text
43 lines
1.7 KiB
Text
<<<
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:sectnums:
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==== Data Memory (DMEM)
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[cols="<3,<3,<4"]
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[grid="none"]
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|=======================
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| Hardware source files: | neorv32_dmem.vhd | default platform-agnostic data memory
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| Software driver files: | none | _implicitly used_
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| Top entity ports: | none |
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| Configuration generics: | `MEM_INT_DMEM_EN` | implement processor-internal DMEM when `true`
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| | `MEM_INT_DMEM_SIZE` | DMEM size in bytes (use a power of 2)
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| CPU interrupts: | none |
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|=======================
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**Overview**
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Implementation of the processor-internal data memory is enabled by the processor's `MEM_INT_DMEM_EN`
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generic. The total memory size in bytes is defined via the `MEM_INT_DMEM_SIZE` generic. Note that this
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size should be a power of two to optimize physical implementation. If the DMEM is implemented,
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it is mapped to base address `0x80000000` by default (see section <<_address_space>>).
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The DMEM is always implemented as true RAM.
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.Platform-Specific Memory Primitives
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[NOTE]
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If required, the default DMEM can be replaced by a platform-/technology-specific primitive to
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optimize area utilization, timing and power consumption.
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.Memory Size
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[NOTE]
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If the configured memory size (via the `MEM_INT_DMEM_SIZE` generic) is not a power of two the actual memory
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size will be auto-adjusted to the next power of two (e.g. configuring a memory size of 60kB will result in a
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physical memory size of 64kB).
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.Legacy HDL Style
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[TIP]
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If synthesis fails to infer block RAM for the DMEM, turn on the `alt_style_c` option inside
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the memory's VHDL source file. When enabled, a different HDL style is used to describe the memory core.
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.Execute from RAM
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[TIP]
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The CPU is capable of executing code also from arbitrary data memory.
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