mirror of
https://github.com/stnolting/neorv32.git
synced 2025-04-21 04:37:30 -04:00
52 lines
1.5 KiB
INI
52 lines
1.5 KiB
INI
# -------------------------------------------------------------------
|
|
# Target configuration and (session) initialization
|
|
# Do not edits this file.
|
|
# -------------------------------------------------------------------
|
|
proc target_setup { {NUM_CORES 1} } {
|
|
|
|
# path of this file
|
|
set PATH [ file dirname [ file normalize [ info script ] ] ]
|
|
|
|
# configure physical interface
|
|
source [file join $PATH interface.cfg]
|
|
|
|
set CORENAME neorv32
|
|
|
|
# configures JTAG tap
|
|
jtag newtap $CORENAME cpu -irlen 5
|
|
|
|
# attach core(s)
|
|
if { $NUM_CORES == 1 } {
|
|
set TARGETNAME $CORENAME.cpu
|
|
target create $TARGETNAME riscv -chain-position $TARGETNAME
|
|
} elseif { $NUM_CORES == 2 } {
|
|
set TARGETNAME_0 $CORENAME.cpu0
|
|
set TARGETNAME_1 $CORENAME.cpu1
|
|
target create $TARGETNAME_0 riscv -chain-position $CORENAME.cpu -rtos hwthread
|
|
target create $TARGETNAME_1 riscv -chain-position $CORENAME.cpu -coreid 1
|
|
target smp $TARGETNAME_0 $TARGETNAME_1
|
|
} else {
|
|
echo "ERROR: Invalid NUM_CORE configuration!"
|
|
}
|
|
|
|
# GDB server configuration
|
|
gdb report_data_abort enable
|
|
gdb report_register_access_error enable
|
|
|
|
# expose additional / NEORV32-specific CSRs
|
|
riscv expose_csrs 2048=cfureg0
|
|
riscv expose_csrs 2049=cfureg1
|
|
riscv expose_csrs 2050=cfureg2
|
|
riscv expose_csrs 2051=cfureg3
|
|
riscv expose_csrs 4032=mxisa
|
|
|
|
# initialize target
|
|
init
|
|
|
|
# authenticate
|
|
source [file join $PATH authentication.cfg]
|
|
|
|
# halt
|
|
halt
|
|
echo "Target HALTED. Ready for remote connections."
|
|
}
|