neorv32/docs/figures
2024-01-03 20:38:23 +01:00
..
address_space.png [docs] minor updates & fixes 2023-07-29 12:08:55 +02:00
bus_interface.png [docs] update bus protocol description 2023-10-04 21:26:40 +02:00
bus_interface_atomic.png [docs] update bus protocol description 2023-10-04 21:26:40 +02:00
cfu_r3type_instruction.png [docs/figures] fix/update r-type instructions 2022-12-03 10:29:08 +01:00
cfu_r4type_instruction.png [docs/figures] fix/update r-type instructions 2022-12-03 10:29:08 +01:00
cfu_r5type_instruction_a.png [docs/figures] add R5-type instruction formats 2022-12-08 22:52:12 +01:00
cfu_r5type_instruction_b.png [docs/figures] add R5-type instruction formats 2022-12-08 22:52:12 +01:00
icon.png 💄 [docs/figures] minor edits 2023-02-02 16:46:09 +01:00
license.md updated links due to renamend default branch (-> main) 2022-02-08 16:57:22 +01:00
neopixel.png [docs/figures] added NEORV32.pdf figures 2021-04-25 12:49:46 +02:00
neorv32_axi_soc.png [doc/figurs] added exemplary axi SoC setup figure 2020-10-24 14:55:26 +02:00
neorv32_boot_configurations.png [docs/figures] update figures 2023-02-01 18:37:43 +01:00
neorv32_bus.png [docs/figures] updates 2023-07-21 13:48:56 +02:00
neorv32_cpu.png [docs/figures] minor updates 2023-12-06 21:46:25 +01:00
neorv32_logo.png [docs] update logos 2023-02-01 18:39:15 +01:00
neorv32_logo_riscv.png [docs] update logos 2023-02-01 18:39:15 +01:00
neorv32_logo_small.png [docs] update logos 2023-02-01 18:39:15 +01:00
neorv32_logo_smcard.jpg [docs] update logos 2023-02-01 18:39:15 +01:00
neorv32_ocd_complex.png [docs/figures] update figures 2023-02-01 18:37:43 +01:00
neorv32_processor.png [docs] add GPTMR capture input 2024-01-03 20:38:23 +01:00
neorv32_test_setup.png [docs/figures] update figures 2023-02-01 18:37:43 +01:00
onewire_data.png [docs] add section ONEWIRE 2022-09-01 21:18:29 +02:00
onewire_reset.png [docs] add section ONEWIRE 2022-09-01 21:18:29 +02:00
oshw_logo.png 💄 [docs/figures] cosmetic updates for logos and figures 2020-12-09 17:01:15 +01:00
ram_layout.png [docs/figures] add RAM layout 2022-02-11 07:39:28 +01:00
riscv_logo.png added RISC-V logo; minor edits 2020-08-03 18:15:15 +02:00
riscv_logo_small.png [docs/figures] added small risc-v logo 2021-11-17 20:01:11 +01:00
SPI_timing_diagram2.wikimedia.png [docs/figures] added SPI clock modes diagram 2021-10-17 08:45:17 +02:00
stream_link_interface.png [docs] update SLINK documentation 2022-06-16 17:29:25 +02:00
wishbone_classic_read.png [docs/figures] added NEORV32.pdf figures 2021-04-25 12:49:46 +02:00
wishbone_pipelined_write.png [docs/figures] added NEORV32.pdf figures 2021-04-25 12:49:46 +02:00