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79 lines
3.1 KiB
C
79 lines
3.1 KiB
C
// ================================================================================ //
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// The NEORV32 RISC-V Processor - https://github.com/stnolting/neorv32 //
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// Copyright (c) NEORV32 contributors. //
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// Copyright (c) 2020 - 2025 Stephan Nolting. All rights reserved. //
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// Licensed under the BSD-3-Clause license, see LICENSE for details. //
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// SPDX-License-Identifier: BSD-3-Clause //
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// ================================================================================ //
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/**
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* @file neorv32_smp.h
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* @brief SMP HW driver header file.
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*/
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#ifndef neorv32_smp_h
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#define neorv32_smp_h
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/**********************************************************************//**
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* @name Prototypes
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**************************************************************************/
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/**@{*/
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int neorv32_smp_launch(int hart_id, void (*entry_point)(void), uint8_t* stack_memory, size_t stack_size_bytes);
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/**@}*/
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/**********************************************************************//**
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* Get data from core via ICC link.
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* Check link status before #neorv32_smp_icc_avail().
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*
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* @param[in] hart_sel Source core.
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* @return Data word (32-bit) received from selected core.
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**************************************************************************/
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inline uint32_t __attribute__ ((always_inline)) neorv32_smp_icc_get(int hart_sel) {
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neorv32_cpu_csr_write(CSR_MXICCSR0, (uint32_t)hart_sel);
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return neorv32_cpu_csr_read(CSR_MXICCRXD);
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}
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/**********************************************************************//**
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* Send data to core via ICC link.
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* Check link status before #neorv32_smp_icc_free().
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*
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* @param[in] hart_sel Destination core.
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* @param[in] data Data word (32-bit) to be send to selected core.
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**************************************************************************/
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inline void __attribute__ ((always_inline)) neorv32_smp_icc_put(int hart_sel, uint32_t data) {
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neorv32_cpu_csr_write(CSR_MXICCSR0, (uint32_t)hart_sel);
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neorv32_cpu_csr_write(CSR_MXICCTXD, data);
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}
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/**********************************************************************//**
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* Check if ICC link data is available.
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*
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* @param[in] hart_sel Source core.
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* @return 0 = no data available, nonzero = data available.
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**************************************************************************/
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inline int __attribute__ ((always_inline)) neorv32_smp_icc_avail(int hart_sel) {
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neorv32_cpu_csr_write(CSR_MXICCSR0, (uint32_t)hart_sel);
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return neorv32_cpu_csr_read(CSR_MXICCSR0) & (1 << CSR_MXICCSR_RX_AVAIL);
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}
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/**********************************************************************//**
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* Check if free space in ICC link.
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*
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* @param[in] hart_sel Destination core.
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* @return 0 = no free space available, nonzero = free space available.
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**************************************************************************/
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inline int __attribute__ ((always_inline)) neorv32_smp_icc_free(int hart_sel) {
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neorv32_cpu_csr_write(CSR_MXICCSR0, (uint32_t)hart_sel);
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return neorv32_cpu_csr_read(CSR_MXICCSR0) & (1 << CSR_MXICCSR_TX_FREE);
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}
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#endif // neorv32_smp_h
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