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https://github.com/olofk/serv.git
synced 2025-04-20 03:47:09 -04:00
Allow readback of GPIO signal
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parent
ed02951b4d
commit
603c168d9b
3 changed files with 19 additions and 6 deletions
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@ -39,7 +39,9 @@ module servant
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wire [31:0] wb_mem_rdt;
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wire wb_mem_ack;
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wire wb_gpio_dat;
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wire wb_gpio_we;
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wire wb_gpio_cyc;
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wire wb_gpio_rdt;
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wire [31:0] wb_timer_dat;
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wire wb_timer_we;
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wire wb_timer_cyc;
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@ -94,7 +96,9 @@ servant_arbiter servant_arbiter
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.i_wb_mem_rdt (wb_dmux_mem_rdt),
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.o_wb_gpio_dat (wb_gpio_dat),
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.o_wb_gpio_we (wb_gpio_we),
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.o_wb_gpio_cyc (wb_gpio_cyc),
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.i_wb_gpio_rdt (wb_gpio_rdt),
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.o_wb_timer_dat (wb_timer_dat),
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.o_wb_timer_we (wb_timer_we),
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@ -143,7 +147,9 @@ servant_arbiter servant_arbiter
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servant_gpio gpio
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(.i_wb_clk (wb_clk),
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.i_wb_dat (wb_gpio_dat),
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.i_wb_we (wb_gpio_we),
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.i_wb_cyc (wb_gpio_cyc),
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.o_wb_rdt (wb_gpio_rdt),
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.o_gpio (q));
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serv_top
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@ -1,11 +1,14 @@
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module servant_gpio
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(
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input wire i_wb_clk,
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(input wire i_wb_clk,
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input wire i_wb_dat,
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input wire i_wb_we,
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input wire i_wb_cyc,
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output reg o_wb_rdt,
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output reg o_gpio);
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always @(posedge i_wb_clk)
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if (i_wb_cyc)
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o_gpio <= i_wb_dat;
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always @(posedge i_wb_clk) begin
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o_wb_rdt <= o_gpio;
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if (i_wb_cyc & i_wb_we)
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o_gpio <= i_wb_dat;
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end
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endmodule
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@ -24,7 +24,9 @@ module servant_mux
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input wire [31:0] i_wb_mem_rdt,
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output wire o_wb_gpio_dat,
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output wire o_wb_gpio_we,
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output wire o_wb_gpio_cyc,
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input wire i_wb_gpio_rdt,
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output wire [31:0] o_wb_timer_dat,
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output wire o_wb_timer_we,
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@ -35,7 +37,8 @@ module servant_mux
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wire [1:0] s = i_wb_cpu_adr[31:30];
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assign o_wb_cpu_rdt = s[1] ? i_wb_timer_rdt : i_wb_mem_rdt;
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assign o_wb_cpu_rdt = s[1] ? i_wb_timer_rdt :
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s[0] ? {31'd0,i_wb_gpio_rdt} : i_wb_mem_rdt;
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always @(posedge i_clk) begin
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o_wb_cpu_ack <= 1'b0;
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if (i_wb_cpu_cyc & !o_wb_cpu_ack)
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@ -51,6 +54,7 @@ module servant_mux
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assign o_wb_mem_cyc = i_wb_cpu_cyc & (s == 2'b00);
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assign o_wb_gpio_dat = i_wb_cpu_dat[0];
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assign o_wb_gpio_we = i_wb_cpu_we;
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assign o_wb_gpio_cyc = i_wb_cpu_cyc & (s == 2'b01);
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assign o_wb_timer_dat = i_wb_cpu_dat;
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