|
ser_add.v
|
Use custom interconnect. Runs on hw
|
2018-11-21 13:15:33 +01:00 |
|
ser_lt.v
|
Fix bugs and missing resets to pass formal
|
2018-12-11 22:05:32 +01:00 |
|
ser_shift.v
|
Reduce warnings
|
2019-06-24 15:22:08 +02:00 |
|
serv_alu.v
|
Simplify alu_cmp_eq control logic
|
2019-07-23 12:10:38 +02:00 |
|
serv_bufreg.v
|
Reduce warnings
|
2019-06-24 15:22:08 +02:00 |
|
serv_csr.v
|
Move mepc and mtval into RF memory
|
2019-07-08 07:49:58 +02:00 |
|
serv_ctrl.v
|
Reduce warnings
|
2019-06-24 15:22:08 +02:00 |
|
serv_decode.v
|
Simplify csr_en logic
|
2019-07-23 12:10:38 +02:00 |
|
serv_mem_if.v
|
Declare wires before use
|
2019-06-24 13:18:34 +02:00 |
|
serv_mpram.v
|
Move mepc and mtval into RF memory
|
2019-07-08 07:49:58 +02:00 |
|
serv_params.vh
|
Simplify alu_cmp_eq control logic
|
2019-07-23 12:10:38 +02:00 |
|
serv_regfile.v
|
Add SERV_CLEAR_RAM parameter
|
2019-06-24 13:18:34 +02:00 |
|
serv_top.v
|
Simplify alu_cmp_eq control logic
|
2019-07-23 12:10:38 +02:00 |
|
shift_reg.v
|
Fix bugs and missing resets to pass formal
|
2018-12-11 22:05:32 +01:00 |
