mirror of
https://github.com/vortexgpgpu/vortex.git
synced 2025-04-23 21:39:10 -04:00
Using verilog For-loops + Passing all tests
This commit is contained in:
parent
a3a3b21de7
commit
52a839f84d
12 changed files with 2379 additions and 587 deletions
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@ -1,8 +1,7 @@
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#define NT 2
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#define NT_M1 1
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#define NT_T2_M1 3
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#define NT 5
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#define NT_M1 4
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#define R_INST 51
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#define L_INST 3
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@ -1,7 +1,6 @@
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`define NT 2
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`define NT_M1 1
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`define NT_T2_M1 3
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`define NT 5
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`define NT_M1 4
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`define R_INST 7'd51
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@ -45,14 +45,14 @@ module VX_fetch (
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reg[`NT_M1:0] valid;
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// integer ini_cur_th = 0;
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integer ini_cur_th = 0;
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genvar out_cur_th;
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initial begin
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// for (ini_cur_th = 0; ini_cur_th < `NT; ini_cur_th=ini_cur_th+1)
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// valid[ini_cur_th] = 1; // Thread 1 active
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for (ini_cur_th = 1; ini_cur_th < `NT; ini_cur_th=ini_cur_th+1)
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valid[ini_cur_th] = 0; // Thread 1 active
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valid[0] = 1;
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valid[1] = 0;
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// valid[1] = 0;
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stall_reg = 0;
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delay_reg = 0;
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old = 0;
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Binary file not shown.
File diff suppressed because it is too large
Load diff
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@ -27,10 +27,10 @@ VL_MODULE(VVortex) {
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VL_OUT8(out_cache_driver_in_mem_write,2,0);
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VL_IN(fe_instruction,31,0);
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VL_OUT(curr_PC,31,0);
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VL_IN(in_cache_driver_out_data[2],31,0);
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VL_OUT(out_cache_driver_in_address[2],31,0);
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VL_OUT8(out_cache_driver_in_valid[2],0,0);
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VL_OUT(out_cache_driver_in_data[2],31,0);
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VL_IN(in_cache_driver_out_data[5],31,0);
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VL_OUT(out_cache_driver_in_address[5],31,0);
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VL_OUT8(out_cache_driver_in_valid[5],0,0);
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VL_OUT(out_cache_driver_in_data[5],31,0);
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// LOCAL SIGNALS
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// Internals; generally not touched by application code
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@ -48,7 +48,7 @@ VL_MODULE(VVortex) {
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VL_SIG8(Vortex__DOT__vx_fetch__DOT__state,4,0);
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VL_SIG8(Vortex__DOT__vx_fetch__DOT__prev_debug,0,0);
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VL_SIG8(Vortex__DOT__vx_fetch__DOT__stall,0,0);
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VL_SIG8(Vortex__DOT__vx_fetch__DOT__valid,1,0);
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VL_SIG8(Vortex__DOT__vx_fetch__DOT__valid,4,0);
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VL_SIG8(Vortex__DOT__vx_decode__DOT__is_itype,0,0);
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VL_SIG8(Vortex__DOT__vx_decode__DOT__is_csr,0,0);
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VL_SIG8(Vortex__DOT__vx_decode__DOT__mul_alu,4,0);
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@ -114,50 +114,50 @@ VL_MODULE(VVortex) {
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VL_SIG64(Vortex__DOT__vx_execute__DOT__vx_alu_1__DOT__mult_signed_result,63,0);
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VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__cycle,63,0);
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VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__instret,63,0);
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VL_SIG8(Vortex__DOT__fetch_valid[2],0,0);
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VL_SIG8(Vortex__DOT__f_d_valid[2],0,0);
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VL_SIG(Vortex__DOT__decode_a_reg_data[2],31,0);
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VL_SIG(Vortex__DOT__decode_b_reg_data[2],31,0);
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VL_SIG8(Vortex__DOT__decode_valid[2],0,0);
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VL_SIG(Vortex__DOT__d_e_a_reg_data[2],31,0);
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VL_SIG(Vortex__DOT__d_e_b_reg_data[2],31,0);
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VL_SIG8(Vortex__DOT__d_e_valid[2],0,0);
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VL_SIG(Vortex__DOT__execute_alu_result[2],31,0);
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VL_SIG(Vortex__DOT__execute_b_reg_data[2],31,0);
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VL_SIG8(Vortex__DOT__execute_valid[2],0,0);
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VL_SIG(Vortex__DOT__e_m_alu_result[2],31,0);
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VL_SIG(Vortex__DOT__e_m_b_reg_data[2],31,0);
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VL_SIG8(Vortex__DOT__e_m_valid[2],0,0);
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VL_SIG(Vortex__DOT__memory_alu_result[2],31,0);
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VL_SIG(Vortex__DOT__memory_mem_result[2],31,0);
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VL_SIG8(Vortex__DOT__memory_valid[2],0,0);
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VL_SIG(Vortex__DOT__m_w_alu_result[2],31,0);
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VL_SIG(Vortex__DOT__m_w_mem_result[2],31,0);
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VL_SIG8(Vortex__DOT__m_w_valid[2],0,0);
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VL_SIG(Vortex__DOT__writeback_write_data[2],31,0);
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VL_SIG(Vortex__DOT__forwarding_src1_fwd_data[2],31,0);
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VL_SIG(Vortex__DOT__forwarding_src2_fwd_data[2],31,0);
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VL_SIG8(Vortex__DOT__vx_f_d_reg__DOT__valid[2],0,0);
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VL_SIG(Vortex__DOT__vx_decode__DOT__rd1_register[2],31,0);
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VL_SIG(Vortex__DOT__vx_decode__DOT__rd2_register[2],31,0);
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VL_SIG8(Vortex__DOT__fetch_valid[5],0,0);
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VL_SIG8(Vortex__DOT__f_d_valid[5],0,0);
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VL_SIG(Vortex__DOT__decode_a_reg_data[5],31,0);
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VL_SIG(Vortex__DOT__decode_b_reg_data[5],31,0);
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VL_SIG8(Vortex__DOT__decode_valid[5],0,0);
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VL_SIG(Vortex__DOT__d_e_a_reg_data[5],31,0);
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VL_SIG(Vortex__DOT__d_e_b_reg_data[5],31,0);
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VL_SIG8(Vortex__DOT__d_e_valid[5],0,0);
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VL_SIG(Vortex__DOT__execute_alu_result[5],31,0);
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VL_SIG(Vortex__DOT__execute_b_reg_data[5],31,0);
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VL_SIG8(Vortex__DOT__execute_valid[5],0,0);
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VL_SIG(Vortex__DOT__e_m_alu_result[5],31,0);
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VL_SIG(Vortex__DOT__e_m_b_reg_data[5],31,0);
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VL_SIG8(Vortex__DOT__e_m_valid[5],0,0);
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VL_SIG(Vortex__DOT__memory_alu_result[5],31,0);
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VL_SIG(Vortex__DOT__memory_mem_result[5],31,0);
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VL_SIG8(Vortex__DOT__memory_valid[5],0,0);
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VL_SIG(Vortex__DOT__m_w_alu_result[5],31,0);
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VL_SIG(Vortex__DOT__m_w_mem_result[5],31,0);
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VL_SIG8(Vortex__DOT__m_w_valid[5],0,0);
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VL_SIG(Vortex__DOT__writeback_write_data[5],31,0);
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VL_SIG(Vortex__DOT__forwarding_src1_fwd_data[5],31,0);
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VL_SIG(Vortex__DOT__forwarding_src2_fwd_data[5],31,0);
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VL_SIG8(Vortex__DOT__vx_f_d_reg__DOT__valid[5],0,0);
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VL_SIG(Vortex__DOT__vx_decode__DOT__rd1_register[5],31,0);
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VL_SIG(Vortex__DOT__vx_decode__DOT__rd2_register[5],31,0);
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VL_SIG(Vortex__DOT__vx_decode__DOT__vx_register_file_0__DOT__registers[32],31,0);
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VL_SIG(Vortex__DOT__vx_decode__DOT__vx_register_file_1__DOT__registers[32],31,0);
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VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[2],31,0);
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VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[2],31,0);
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VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid[2],0,0);
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VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[2],31,0);
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VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid_z[2],0,0);
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VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__alu_result[2],31,0);
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VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[2],31,0);
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VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[2],31,0);
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VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__valid[2],0,0);
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VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__alu_result[2],31,0);
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VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__mem_result[2],31,0);
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VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__valid[2],0,0);
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VL_SIG(Vortex__DOT__vx_writeback__DOT__out_pc_data[2],31,0);
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VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2],31,0);
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VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2],31,0);
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VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2],31,0);
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VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__a_reg_data[5],31,0);
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VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__b_reg_data[5],31,0);
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VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid[5],0,0);
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VL_SIG(Vortex__DOT__vx_d_e_reg__DOT__reg_data_z[5],31,0);
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VL_SIG8(Vortex__DOT__vx_d_e_reg__DOT__valid_z[5],0,0);
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VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__alu_result[5],31,0);
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VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__a_reg_data[5],31,0);
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VL_SIG(Vortex__DOT__vx_e_m_reg__DOT__b_reg_data[5],31,0);
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VL_SIG8(Vortex__DOT__vx_e_m_reg__DOT__valid[5],0,0);
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VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__alu_result[5],31,0);
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VL_SIG(Vortex__DOT__vx_m_w_reg__DOT__mem_result[5],31,0);
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VL_SIG8(Vortex__DOT__vx_m_w_reg__DOT__valid[5],0,0);
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VL_SIG(Vortex__DOT__vx_writeback__DOT__out_pc_data[5],31,0);
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VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[5],31,0);
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VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[5],31,0);
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VL_SIG(Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[5],31,0);
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VL_SIG16(Vortex__DOT__vx_csr_handler__DOT__csr[4096],11,0);
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};
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@ -175,64 +175,64 @@ VL_MODULE(VVortex) {
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VL_SIG(Vortex__DOT__vx_decode__DOT____Vcellout__vx_register_file_1__out_src1_data,31,0);
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VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__vx_alu_0__out_alu_result,31,0);
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VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__vx_alu_1__out_alu_result,31,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_fetch__out_valid[2],0,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[2],0,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[2],0,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_write_data[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_valid[2],0,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_execute__out_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_alu_result[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_execute__in_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_mem_result[2],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_alu_result[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_memory__in_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_rd2[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_alu_result[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[2],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[2],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_writeback__out_write_data[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_writeback__in_valid[2],0,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[2],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[2],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[2],31,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_fetch__out_valid[5],0,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_f_d_reg__out_valid[5],0,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_f_d_reg__in_valid[5],0,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_decode__out_valid[5],0,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_b_reg_data[5],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_decode__out_a_reg_data[5],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src2_fwd_data[5],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_src1_fwd_data[5],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_wb_valid[5],0,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_decode__in_write_data[5],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_decode__in_valid[5],0,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_d_e_reg__out_valid[5],0,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_b_reg_data[5],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_d_e_reg__out_a_reg_data[5],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_d_e_reg__in_valid[5],0,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_b_reg_data[5],31,0);
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VL_SIG(Vortex__DOT____Vcellinp__vx_d_e_reg__in_a_reg_data[5],31,0);
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VL_SIG8(Vortex__DOT____Vcellout__vx_execute__out_valid[5],0,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_b_reg_data[5],31,0);
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VL_SIG(Vortex__DOT____Vcellout__vx_execute__out_alu_result[5],31,0);
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VL_SIG8(Vortex__DOT____Vcellinp__vx_execute__in_valid[5],0,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_b_reg_data[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_execute__in_a_reg_data[5],31,0);
|
||||
VL_SIG8(Vortex__DOT____Vcellout__vx_e_m_reg__out_valid[5],0,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_b_reg_data[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_e_m_reg__out_alu_result[5],31,0);
|
||||
VL_SIG8(Vortex__DOT____Vcellinp__vx_e_m_reg__in_valid[5],0,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_b_reg_data[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_e_m_reg__in_alu_result[5],31,0);
|
||||
VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[5],0,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[5],31,0);
|
||||
VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_valid[5],0,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_mem_result[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_alu_result[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[5],31,0);
|
||||
VL_SIG8(Vortex__DOT____Vcellinp__vx_memory__in_valid[5],0,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_rd2[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_alu_result[5],31,0);
|
||||
VL_SIG8(Vortex__DOT____Vcellout__vx_m_w_reg__out_valid[5],0,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_mem_result[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_m_w_reg__out_alu_result[5],31,0);
|
||||
VL_SIG8(Vortex__DOT____Vcellinp__vx_m_w_reg__in_valid[5],0,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_mem_result[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_m_w_reg__in_alu_result[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_writeback__out_write_data[5],31,0);
|
||||
VL_SIG8(Vortex__DOT____Vcellinp__vx_writeback__in_valid[5],0,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_mem_result[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_writeback__in_alu_result[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src2_fwd_data[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellout__vx_forwarding__out_src1_fwd_data[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_mem_data[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_writeback_alu_result[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_mem_data[5],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_memory_alu_result[5],31,0);
|
||||
};
|
||||
struct {
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[2],31,0);
|
||||
VL_SIG(Vortex__DOT____Vcellinp__vx_forwarding__in_execute_alu_result[5],31,0);
|
||||
};
|
||||
static VL_ST_SIG8(__Vtable1_Vortex__DOT__vx_decode__DOT__mul_alu[8],4,0);
|
||||
|
||||
|
@ -268,7 +268,7 @@ VL_MODULE(VVortex) {
|
|||
private:
|
||||
static QData _change_request(VVortex__Syms* __restrict vlSymsp);
|
||||
public:
|
||||
static void _combo__TOP__3(VVortex__Syms* __restrict vlSymsp);
|
||||
static void _combo__TOP__4(VVortex__Syms* __restrict vlSymsp);
|
||||
static void _combo__TOP__9(VVortex__Syms* __restrict vlSymsp);
|
||||
private:
|
||||
void _ctor_var_reset();
|
||||
|
@ -284,9 +284,9 @@ VL_MODULE(VVortex) {
|
|||
static void _initial__TOP__6(VVortex__Syms* __restrict vlSymsp);
|
||||
static void _sequent__TOP__1(VVortex__Syms* __restrict vlSymsp);
|
||||
static void _sequent__TOP__2(VVortex__Syms* __restrict vlSymsp);
|
||||
static void _sequent__TOP__5(VVortex__Syms* __restrict vlSymsp);
|
||||
static void _sequent__TOP__3(VVortex__Syms* __restrict vlSymsp);
|
||||
static void _sequent__TOP__7(VVortex__Syms* __restrict vlSymsp);
|
||||
static void _settle__TOP__4(VVortex__Syms* __restrict vlSymsp);
|
||||
static void _settle__TOP__5(VVortex__Syms* __restrict vlSymsp);
|
||||
static void _settle__TOP__8(VVortex__Syms* __restrict vlSymsp);
|
||||
} VL_ATTR_ALIGNED(128);
|
||||
|
||||
|
|
Binary file not shown.
Binary file not shown.
|
@ -5,22 +5,22 @@ S 2862 12889318286 1553966962 0 1553966962 0 "VX_alu.
|
|||
S 1495 12889087229 1553211178 0 1553211178 0 "VX_csr_handler.v"
|
||||
S 5040 12889318287 1553995422 0 1553995422 0 "VX_d_e_reg.v"
|
||||
S 11888 12889419225 1553995767 0 1553995767 0 "VX_decode.v"
|
||||
S 1551 12889419227 1553898607 0 1553898607 0 "VX_define.v"
|
||||
S 1532 12889419227 1553998396 0 1553998396 0 "VX_define.v"
|
||||
S 4077 12889318289 1553997299 0 1553997299 0 "VX_e_m_reg.v"
|
||||
S 4908 12889318290 1553997136 0 1553997136 0 "VX_execute.v"
|
||||
S 1382 12889050060 1553673124 0 1553673124 0 "VX_f_d_reg.v"
|
||||
S 4048 12889419228 1553932280 0 1553932280 0 "VX_fetch.v"
|
||||
S 4042 12889419228 1553998456 0 1553998456 0 "VX_fetch.v"
|
||||
S 5632 12889086478 1553672336 0 1553672336 0 "VX_forwarding.v"
|
||||
S 1677 12889085814 1553673165 0 1553673165 0 "VX_m_w_reg.v"
|
||||
S 3002 12889084513 1553997670 0 1553997670 0 "VX_memory.v"
|
||||
S 1003 12889419229 1553930745 0 1553930745 0 "VX_register_file.v"
|
||||
S 1173 12889419230 1553930874 0 1553930874 0 "VX_writeback.v"
|
||||
S 16452 12889419231 1553997933 0 1553997933 0 "Vortex.v"
|
||||
T 183333 12889432530 1553998021 0 1553998021 0 "obj_dir/VVortex.cpp"
|
||||
T 14673 12889432529 1553998021 0 1553998021 0 "obj_dir/VVortex.h"
|
||||
T 1800 12889432532 1553998021 0 1553998021 0 "obj_dir/VVortex.mk"
|
||||
T 530 12889432528 1553998021 0 1553998021 0 "obj_dir/VVortex__Syms.cpp"
|
||||
T 717 12889432527 1553998021 0 1553998021 0 "obj_dir/VVortex__Syms.h"
|
||||
T 464 12889432533 1553998021 0 1553998021 0 "obj_dir/VVortex__ver.d"
|
||||
T 0 0 1553998021 0 1553998021 0 "obj_dir/VVortex__verFiles.dat"
|
||||
T 1159 12889432531 1553998021 0 1553998021 0 "obj_dir/VVortex_classes.mk"
|
||||
T 276821 12889432530 1553998459 0 1553998459 0 "obj_dir/VVortex.cpp"
|
||||
T 14673 12889432529 1553998459 0 1553998459 0 "obj_dir/VVortex.h"
|
||||
T 1800 12889432532 1553998459 0 1553998459 0 "obj_dir/VVortex.mk"
|
||||
T 530 12889432528 1553998459 0 1553998459 0 "obj_dir/VVortex__Syms.cpp"
|
||||
T 717 12889432527 1553998459 0 1553998459 0 "obj_dir/VVortex__Syms.h"
|
||||
T 464 12889432533 1553998459 0 1553998459 0 "obj_dir/VVortex__ver.d"
|
||||
T 0 0 1553998459 0 1553998459 0 "obj_dir/VVortex__verFiles.dat"
|
||||
T 1159 12889432531 1553998459 0 1553998459 0 "obj_dir/VVortex_classes.mk"
|
||||
|
|
File diff suppressed because it is too large
Load diff
Binary file not shown.
|
@ -5,7 +5,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01843
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-addi.hex ****************
|
||||
|
@ -14,7 +14,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03526
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-and.hex ****************
|
||||
|
@ -23,7 +23,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01849
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-andi.hex ****************
|
||||
|
@ -32,7 +32,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.04472
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-auipc.hex ****************
|
||||
|
@ -41,7 +41,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.16923
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-beq.hex ****************
|
||||
|
@ -50,7 +50,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.02552
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-bge.hex ****************
|
||||
|
@ -59,7 +59,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.02355
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-bgeu.hex ****************
|
||||
|
@ -68,7 +68,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.02236
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-blt.hex ****************
|
||||
|
@ -77,7 +77,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.02552
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-bltu.hex ****************
|
||||
|
@ -86,7 +86,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.02412
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-bne.hex ****************
|
||||
|
@ -95,7 +95,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.02552
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-jal.hex ****************
|
||||
|
@ -104,7 +104,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.18033
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-jalr.hex ****************
|
||||
|
@ -113,7 +113,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.07971
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-lb.hex ****************
|
||||
|
@ -122,7 +122,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03323
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-lbu.hex ****************
|
||||
|
@ -131,7 +131,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03323
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-lh.hex ****************
|
||||
|
@ -140,7 +140,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03245
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-lhu.hex ****************
|
||||
|
@ -149,7 +149,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03207
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-lui.hex ****************
|
||||
|
@ -158,7 +158,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.15068
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-lw.hex ****************
|
||||
|
@ -167,7 +167,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03179
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-or.hex ****************
|
||||
|
@ -176,7 +176,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01839
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-ori.hex ****************
|
||||
|
@ -185,7 +185,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.04348
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-sb.hex ****************
|
||||
|
@ -194,7 +194,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01926
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-sh.hex ****************
|
||||
|
@ -203,7 +203,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01824
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-simple.hex ****************
|
||||
|
@ -212,7 +212,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.2973
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-sll.hex ****************
|
||||
|
@ -221,7 +221,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01738
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-slli.hex ****************
|
||||
|
@ -230,7 +230,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03537
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-slt.hex ****************
|
||||
|
@ -239,7 +239,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01861
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-slti.hex ****************
|
||||
|
@ -248,7 +248,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03583
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-sltiu.hex ****************
|
||||
|
@ -257,7 +257,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03583
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-sltu.hex ****************
|
||||
|
@ -266,7 +266,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01861
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-sra.hex ****************
|
||||
|
@ -275,7 +275,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01682
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-srai.hex ****************
|
||||
|
@ -284,7 +284,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03374
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-srl.hex ****************
|
||||
|
@ -293,7 +293,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01698
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-srli.hex ****************
|
||||
|
@ -302,7 +302,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.03438
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-sub.hex ****************
|
||||
|
@ -311,7 +311,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01874
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-sw.hex ****************
|
||||
|
@ -320,7 +320,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01797
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-xor.hex ****************
|
||||
|
@ -329,7 +329,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01843
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32ui-p-xori.hex ****************
|
||||
|
@ -338,7 +338,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.04314
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32um-p-div.hex ****************
|
||||
|
@ -347,7 +347,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.09821
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32um-p-divu.hex ****************
|
||||
|
@ -356,7 +356,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.09735
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32um-p-mul.hex ****************
|
||||
|
@ -365,7 +365,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.01868
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32um-p-mulh.hex ****************
|
||||
|
@ -374,7 +374,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.0188
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32um-p-mulhsu.hex ****************
|
||||
|
@ -383,7 +383,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.0188
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32um-p-mulhu.hex ****************
|
||||
|
@ -392,7 +392,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.0188
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32um-p-rem.hex ****************
|
||||
|
@ -401,7 +401,7 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.09821
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
||||
**************** ../../emulator/riscv_tests/rv32um-p-remu.hex ****************
|
||||
|
@ -410,5 +410,5 @@
|
|||
# of forwarding stalls: 0
|
||||
# of branch stalls: 0
|
||||
# CPI: 1.09821
|
||||
# time to simulate: 6.95313e-310 milliseconds
|
||||
# time to simulate: 6.95312e-310 milliseconds
|
||||
# GRADE: PASSING
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue