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https://github.com/vortexgpgpu/vortex.git
synced 2025-04-24 05:47:35 -04:00
Revert some of "Added ifndef statements for the vector extension anywhere they didn't exist already"
This commit is contained in:
MichaelJSr
parent
a2cfeffcfe
commit
6d27575db3
4 changed files with 9 additions and 62 deletions
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@ -47,9 +47,7 @@ static const std::unordered_map<Opcode, InstType> sc_instTable = {
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{Opcode::FMSUB, InstType::R4},
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{Opcode::FMNMADD, InstType::R4},
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{Opcode::FMNMSUB, InstType::R4},
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#ifdef EXT_V_ENABLE
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{Opcode::VSET, InstType::V},
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#endif
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{Opcode::EXT1, InstType::R},
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{Opcode::EXT2, InstType::R4},
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{Opcode::R_W, InstType::R},
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@ -375,9 +373,7 @@ static const char* op_string(const Instr &instr) {
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case Opcode::FMSUB: return func2 ? "FMSUB.D" : "FMSUB.S";
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case Opcode::FMNMADD: return func2 ? "FNMADD.D" : "FNMADD.S";
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case Opcode::FMNMSUB: return func2 ? "FNMSUB.D" : "FNMSUB.S";
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#ifdef EXT_V_ENABLE
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case Opcode::VSET: return "VSET";
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#endif
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case Opcode::EXT1:
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switch (func7) {
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case 0:
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@ -409,7 +405,6 @@ static const char* op_string(const Instr &instr) {
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}
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}
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#ifdef EXT_V_ENABLE
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inline void print_vec_attr(std::ostream &os, const Instr &instr) {
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uint32_t mask = instr.getVattrMask();
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if (mask & vattr_vlswidth)
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@ -437,7 +432,6 @@ inline void print_vec_attr(std::ostream &os, const Instr &instr) {
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if (mask & vattr_vediv)
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os << ", ediv:" << instr.getVediv();
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}
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#endif
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namespace vortex {
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std::ostream &operator<<(std::ostream &os, const Instr &instr) {
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@ -481,11 +475,9 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
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auto func2 = (code >> shift_func2) & mask_func2;
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auto func3 = (code >> shift_func3) & mask_func3;
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auto func7 = (code >> shift_func7) & mask_func7;
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#ifdef EXT_V_ENABLE
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auto func6 = (code >> shift_func6) & mask_func6;
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auto func7 = (code >> shift_func7) & mask_func7;
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__unused(func6);
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#endif
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auto rd = (code >> shift_rd) & mask_reg;
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auto rs1 = (code >> shift_rs1) & mask_reg;
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@ -499,13 +491,11 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
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}
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auto iType = op_it->second;
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#ifdef EXT_V_ENABLE
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if (op == Opcode::FL || op == Opcode::FS) {
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if (func3 != 0x2 && func3 != 0x3) {
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iType = InstType::V;
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}
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}
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#endif
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switch (iType) {
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case InstType::R:
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@ -594,9 +584,7 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
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instr->addSrcReg(rs2, RegType::Integer);
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break;
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}
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#ifdef EXT_V_ENABLE
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instr->setFunc3(func3);
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#endif
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instr->setFunc7(func7);
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break;
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@ -605,9 +593,7 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
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case Opcode::TCU: {
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instr->setDestReg(rs1, RegType::Integer);
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instr->addSrcReg(rs1, RegType::Integer);
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#ifdef EXT_V_ENABLE
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instr->setFunc3(func3);
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#endif
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instr->setFunc7(func7);
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auto imm = code >> shift_rs2;
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instr->setImm(sext(imm, width_i_imm));
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@ -617,9 +603,7 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
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case Opcode::JALR:
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instr->setDestReg(rd, RegType::Integer);
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instr->addSrcReg(rs1, RegType::Integer);
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#ifdef EXT_V_ENABLE
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instr->setFunc3(func3);
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#endif
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if (func3 == 0x1 || func3 == 0x5) {
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// Shift instructions
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auto shamt = rs2; // uint5
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@ -640,25 +624,19 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
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case Opcode::FL: {
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instr->setDestReg(rd, (op == Opcode::FL) ? RegType::Float : RegType::Integer);
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instr->addSrcReg(rs1, RegType::Integer);
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#ifdef EXT_V_ENABLE
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instr->setFunc3(func3);
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#endif
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auto imm = code >> shift_rs2;
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instr->setImm(sext(imm, width_i_imm));
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} break;
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case Opcode::FENCE:
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#ifdef EXT_V_ENABLE
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instr->setFunc3(func3);
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#endif
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instr->setImm(code >> shift_rs2);
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break;
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case Opcode::SYS:
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if (func3 != 0) {
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// CSR instructions
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instr->setDestReg(rd, RegType::Integer);
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#ifdef EXT_V_ENABLE
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instr->setFunc3(func3);
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#endif
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if (func3 < 5) {
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instr->addSrcReg(rs1, RegType::Integer);
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} else {
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@ -679,9 +657,7 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
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case InstType::S: {
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instr->addSrcReg(rs1, RegType::Integer);
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instr->addSrcReg(rs2, (op == Opcode::FS) ? RegType::Float : RegType::Integer);
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#ifdef EXT_V_ENABLE
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instr->setFunc3(func3);
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#endif
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auto imm = (func7 << width_reg) | rd;
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instr->setImm(sext(imm, width_i_imm));
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} break;
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@ -689,9 +665,7 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
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case InstType::B: {
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instr->addSrcReg(rs1, RegType::Integer);
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instr->addSrcReg(rs2, RegType::Integer);
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#ifdef EXT_V_ENABLE
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instr->setFunc3(func3);
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#endif
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auto bit_11 = rd & 0x1;
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auto bits_4_1 = rd >> 1;
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auto bit_10_5 = func7 & 0x3f;
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@ -723,9 +697,7 @@ std::shared_ptr<Instr> Emulator::decode(uint32_t code) const {
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instr->addSrcReg(rs2, RegType::Float);
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instr->addSrcReg(rs3, RegType::Float);
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instr->setFunc2(func2);
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#ifdef EXT_V_ENABLE
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instr->setFunc3(func3);
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#endif
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} break;
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#ifdef EXT_V_ENABLE
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@ -81,7 +81,6 @@ private:
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bool fallthrough;
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};
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#ifdef EXT_V_ENABLE
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struct vtype_t {
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uint32_t vill;
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uint32_t vma;
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@ -89,7 +88,6 @@ private:
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uint32_t vsew;
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uint32_t vlmul;
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};
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#endif
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union reg_data_t {
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Word u;
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@ -111,14 +109,12 @@ private:
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ThreadMask tmask;
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std::vector<std::vector<Word>> ireg_file;
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std::vector<std::vector<uint64_t>>freg_file;
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std::vector<std::vector<Byte>> vreg_file;
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std::stack<ipdom_entry_t> ipdom_stack;
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Byte fcsr;
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#ifdef EXT_V_ENABLE
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std::vector<std::vector<Byte>> vreg_file;
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vtype_t vtype;
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uint32_t vl;
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Word vlmax;
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#endif
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uint32_t uuid;
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};
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@ -177,9 +173,7 @@ private:
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uint32_t mat_size;
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uint32_t tc_size;
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uint32_t tc_num;
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#ifdef EXT_V_ENABLE
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std::vector<std::vector<std::unordered_map<uint32_t, uint32_t>>> csrs_;
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#endif
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};
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}
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@ -42,10 +42,8 @@ enum class Opcode {
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// RV64 Standard Extension
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R_W = 0x3b,
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I_W = 0x1b,
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#ifdef EXT_V_ENABLE
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// Vector Extension
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VSET = 0x57,
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#endif
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// Custom Extensions
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EXT1 = 0x0b,
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EXT2 = 0x2b,
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@ -60,9 +58,7 @@ enum class InstType {
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B,
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U,
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J,
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#ifdef EXT_V_ENABLE
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V,
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#endif
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R4
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};
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@ -142,7 +138,6 @@ public:
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, rdest_(0)
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, func2_(0)
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, func3_(0)
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#ifdef EXT_V_ENABLE
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, func6_(0)
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, func7_(0)
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, vmask_(0)
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@ -157,9 +152,8 @@ public:
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, vta_(0)
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, vma_(0)
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, vediv_(0)
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, vattr_mask_(0)
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#endif
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{ for (uint32_t i = 0; i < MAX_REG_SOURCES; ++i) {
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, vattr_mask_(0) {
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for (uint32_t i = 0; i < MAX_REG_SOURCES; ++i) {
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rsrc_type_[i] = RegType::None;
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rsrc_[i] = 0;
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}
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@ -189,11 +183,9 @@ public:
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void setImm(uint32_t imm) { has_imm_ = true; imm_ = imm; }
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void setFunc2(uint32_t func2) { func2_ = func2; }
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void setFunc7(uint32_t func7) { func7_ = func7; }
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#ifdef EXT_V_ENABLE
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void setFunc3(uint32_t func3) { func3_ = func3; }
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void setFunc6(uint32_t func6) { func6_ = func6; }
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void setFunc7(uint32_t func7) { func7_ = func7; }
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// Attributes for Vector instructions
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void setVlsWidth(uint32_t width) { vlsWidth_ = width; vattr_mask_ |= vattr_vlswidth; }
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@ -208,7 +200,6 @@ public:
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void setVta(uint32_t vta) { vta_ = vta; vattr_mask_ |= vattr_vta; }
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void setVma(uint32_t vma) { vma_ = vma; vattr_mask_ |= vattr_vma; }
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void setVediv(uint32_t ediv) { vediv_ = 1 << ediv; vattr_mask_ |= vattr_vediv; }
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#endif
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Opcode getOpcode() const { return opcode_; }
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@ -224,10 +215,8 @@ public:
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uint32_t getFunc2() const { return func2_; }
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uint32_t getFunc3() const { return func3_; }
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uint32_t getFunc7() const { return func7_; }
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#ifdef EXT_V_ENABLE
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uint32_t getFunc6() const { return func6_; }
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uint32_t getFunc7() const { return func7_; }
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uint32_t getVlsWidth() const { return vlsWidth_; }
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uint32_t getVmop() const { return vMop_; }
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@ -242,7 +231,6 @@ public:
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uint32_t getVma() const { return vma_; }
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uint32_t getVediv() const { return vediv_; }
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uint32_t getVattrMask() const { return vattr_mask_; }
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#endif
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private:
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@ -260,10 +248,8 @@ private:
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uint32_t rdest_;
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uint32_t func2_;
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uint32_t func3_;
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uint32_t func7_;
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#ifdef EXT_V_ENABLE
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uint32_t func6_;
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uint32_t func7_;
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// Vector
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uint32_t vmask_;
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@ -279,7 +265,6 @@ private:
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uint32_t vma_;
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uint32_t vediv_;
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uint32_t vattr_mask_;
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#endif
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friend std::ostream &operator<<(std::ostream &, const Instr&);
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};
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@ -84,10 +84,8 @@ enum class RegType {
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None,
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Integer,
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Float,
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#ifdef EXT_V_ENABLE
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Vector,
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#endif
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Count
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Count,
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Vector
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};
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inline std::ostream &operator<<(std::ostream &os, const RegType& type) {
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@ -95,9 +93,7 @@ inline std::ostream &operator<<(std::ostream &os, const RegType& type) {
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case RegType::None: break;
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case RegType::Integer: os << "x"; break;
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case RegType::Float: os << "f"; break;
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#ifdef EXT_V_ENABLE
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case RegType::Vector: os << "v"; break;
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#endif
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default: assert(false);
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}
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return os;
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