minor update

This commit is contained in:
Blaise Tine 2023-04-06 20:58:02 -07:00
parent d67deb53c4
commit 77acfaec00
16 changed files with 47 additions and 48 deletions

View file

@ -1,10 +1,4 @@
`ifndef NOPAE
`include "afu_json_info.vh"
`else
`include "vortex_afu.vh"
`endif
`include "VX_define.vh"
`include "VX_gpu_types.vh"
/* verilator lint_off IMPORTSTAR */
import ccip_if_pkg::*;

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@ -1,8 +1,9 @@
`ifndef VORTEX_AFU_VH
`define VORTEX_AFU_VH
`include "ccip_if_pkg.sv"
`ifndef NOPAE
`include "afu_json_info.vh"
`else
`define PLATFORM_PROVIDES_LOCAL_MEMORY
`ifndef PLATFORM_PARAM_LOCAL_MEMORY_BANKS
@ -21,8 +22,6 @@
`define PLATFORM_PARAM_LOCAL_MEMORY_BURST_CNT_WIDTH 4
`endif
`include "local_mem_cfg_pkg.sv"
`define AFU_ACCEL_NAME "vortex_afu"
`define AFU_ACCEL_UUID 128'h35f9452b_25c2_434c_93d5_6f8c60db361c
@ -45,4 +44,9 @@
`define AFU_IMAGE_POWER 0
`define AFU_TOP_IFC "ccip_std_afu_avalon_mm"
`endif // NOPAE
`include "VX_define.vh"
`include "VX_gpu_types.vh"
`endif // VORTEX_AFU_VH

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@ -1,4 +1,4 @@
`include "VX_define.vh"
`include "vortex_afu.vh"
module VX_afu_ctrl #(
parameter AXI_ADDR_WIDTH = 6,

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@ -1,4 +1,3 @@
`include "VX_define.vh"
`include "vortex_afu.vh"
module VX_afu_wrap #(

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@ -1,4 +1,3 @@
`include "VX_define.vh"
`include "vortex_afu.vh"
module vortex_afu #(

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@ -94,4 +94,6 @@
assign m_axi_mem_bresp_a[i] = m``i``_axi_mem_bresp; \
assign m_axi_mem_bid_a[i] = m``i``_axi_mem_bid
`include "VX_define.vh"
`endif // VORTEX_AFU_VH

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@ -96,7 +96,7 @@ vortex_afu.h: vortex_afu.json
setup:
mkdir -p $(BUILD_DIR)/src
$(SCRIPT_DIR)/gen_sources.sh $(CFLAGS) -F$(BUILD_DIR)/src -P -Osources.txt
$(SCRIPT_DIR)/gen_sources.sh $(CFLAGS) -F$(BUILD_DIR)/src -Osources.txt
ifeq ($(TARGET), ase)
afu_sim_setup -f -s setup.cfg $(BUILD_DIR)
else

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@ -13,7 +13,10 @@ ifeq ($(DEVICE_FAMILY), arria10)
DEVICE = 10AX115N3F40E2SG
endif
CONFIGS += -set "NDEBUG"
CONFIGS += -DNDEBUG
CONFIGS += -DQUARTUS
CONFIGS += -DSYNTHESIS
CONFIGS += -DNOGLOBALS
PROJECT_FILES = $(PROJECT).qpf $(PROJECT).qsf
@ -30,7 +33,7 @@ all: gen-sources $(PROJECT).sta.rpt $(PROJECT).pow.rpt
gen-sources: src
src:
mkdir -p src
$(SCRIPT_DIR)/gen_sources.sh $(RTL_INCLUDE) -Fsrc
$(SCRIPT_DIR)/gen_sources.sh $(CONFIGS) $(RTL_INCLUDE) -P -Fsrc
syn: $(PROJECT).syn.rpt
@ -71,7 +74,7 @@ smart.log: $(PROJECT_FILES)
# Project initialization
$(PROJECT_FILES): gen-sources
quartus_sh -t ../../project.tcl -project $(PROJECT) -family $(FAMILY) -device $(DEVICE) -top $(TOP_LEVEL_ENTITY) -src "$(SRC_FILE)" -sdc ../../project.sdc -inc "src" $(CONFIGS)
quartus_sh -t ../../project.tcl -project $(PROJECT) -family $(FAMILY) -device $(DEVICE) -top $(TOP_LEVEL_ENTITY) -src "$(SRC_FILE)" -sdc ../../project.sdc -inc "src"
syn.chg:
$(STAMP) syn.chg

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@ -4,7 +4,7 @@ SRC_FILE = VX_core.sv
include ../../common.mk
CONFIGS += -set "EXT_GFX_ENABLE"
CONFIGS += -DEXT_GFX_ENABLE
FPU_INCLUDE = -I$(RTL_DIR)/fpu_unit -I$(THIRD_PARTY_DIR)/fpnew/src -I$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
GFX_INCLUDE = -I$(RTL_DIR)/tex_unit -I$(RTL_DIR)/raster_unit -I$(RTL_DIR)/rop_unit

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@ -35,8 +35,6 @@ set_global_assignment -name PROJECT_OUTPUT_DIRECTORY bin
set_global_assignment -name NUM_PARALLEL_PROCESSORS ALL
set_global_assignment -name VERILOG_INPUT_VERSION SYSTEMVERILOG_2009
set_global_assignment -name ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS ON
set_global_assignment -name VERILOG_MACRO QUARTUS
set_global_assignment -name VERILOG_MACRO SYNTHESIS
set_global_assignment -name MESSAGE_DISABLE 16818
set_global_assignment -name TIMEQUEST_DO_REPORT_TIMING ON

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@ -4,7 +4,7 @@ SRC_FILE = $(PROJECT).sv
include ../../common.mk
CONFIGS += -set "EXT_GFX_ENABLE"
CONFIGS += -DEXT_GFX_ENABLE
FPU_INCLUDE = -I$(RTL_DIR)/fpu_unit -I$(THIRD_PARTY_DIR)/fpnew/src -I$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
GFX_INCLUDE = -I$(RTL_DIR)/tex_unit -I$(RTL_DIR)/raster_unit -I$(RTL_DIR)/rop_unit

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@ -4,17 +4,17 @@ SRC_FILE = $(PROJECT).sv
include ../../common.mk
CONFIGS += -set "NOPAE"
CONFIGS += -set "EXT_GFX_ENABLE"
CONFIGS += -DNOPAE
CONFIGS += -DEXT_GFX_ENABLE
CONFIGS += -set "NUM_CORES=16"
CONFIGS += -set "NUM_CLUSTERS=1"
CONFIGS += -DNUM_CORES=16
CONFIGS += -DNUM_CLUSTERS=1
CONFIGS += -set "L2_ENABLE"
CONFIGS += -DL2_ENABLE
#CONFIGS += -set "L1_DISABLE"
#CONFIGS += -set "SM_DISABLE"
#CONFIGS += -set "RCACHE_DISABLE" -set "OCACHE_DISABLE" -set "TCACHE_DISABLE"
#CONFIGS += -DL1_DISABLE
#CONFIGS += -DSM_DISABLE
#CONFIGS += -DRCACHE_DISABLE -DOCACHE_DISABLE -DTCACHE_DISABLE
FPU_INCLUDE = -I$(RTL_DIR)/fpu_unit -I$(THIRD_PARTY_DIR)/fpnew/src -I$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
TEX_INCLUDE = -I$(RTL_DIR)/tex_unit -I$(RTL_DIR)/raster_unit -I$(RTL_DIR)/rop_unit

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@ -4,14 +4,14 @@ SRC_FILE = $(PROJECT).sv
include ../../common.mk
CONFIGS += -set "NOPAE"
CONFIGS += -DNOPAE
CONFIGS += -set "NUM_CORES=16"
CONFIGS += -DNUM_CORES=16
CONFIGS += -set "L2_ENABLE"
CONFIGS += -DL2_ENABLE
#CONFIGS += -set "L1_DISABLE"
#CONFIGS += -set "SM_DISABLE"
#CONFIGS += -DL1_DISABLE
#CONFIGS += -DSM_DISABLE
FPU_INCLUDE = -I$(RTL_DIR)/fpu_unit -I$(THIRD_PARTY_DIR)/fpnew/src -I$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
TEX_INCLUDE = -I$(RTL_DIR)/tex_unit

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@ -4,21 +4,21 @@ SRC_FILE = $(PROJECT).sv
include ../../common.mk
CONFIGS += -set "EXT_GFX_ENABLE"
CONFIGS += -DEXT_GFX_ENABLE
#CONFIGS += -set "L1_DISABLE"
#CONFIGS += -DL1_DISABLE
#CONFIGS += -set "SM_DISABLE"
#CONFIGS += -DSM_DISABLE
#CONFIGS += -set "RCACHE_DISABLE" -set "OCACHE_DISABLE" -set "TCACHE_DISABLE"
#CONFIGS += -DRCACHE_DISABLE -DOCACHE_DISABLE -DTCACHE_DISABLE
#CONFIGS += -set "EXT_F_DISABLE"
#CONFIGS += -DEXT_F_DISABLE
#CONFIGS += -set "NUM_WARPS=2" -set "NUM_THREADS=2"
#CONFIGS += -DNUM_WARPS=2 -DNUM_THREADS=2
CONFIGS += -set "NUM_CORES=2"
CONFIGS += -DNUM_CORES=2
CONFIGS += -set "L2_ENABLE"
CONFIGS += -DL2_ENABLE
FPU_INCLUDE = -I$(RTL_DIR)/fpu_unit -I$(THIRD_PARTY_DIR)/fpnew/src -I$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
GFX_INCLUDE = -I$(RTL_DIR)/tex_unit -I$(RTL_DIR)/raster_unit -I$(RTL_DIR)/rop_unit

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@ -4,17 +4,17 @@ SRC_FILE = $(PROJECT).sv
include ../../common.mk
CONFIGS += -set "NUM_CORES=2"
CONFIGS += -DNUM_CORES=2
CONFIGS += -set "L2_ENABLE"
CONFIGS += -DL2_ENABLE
#CONFIGS += -set "L1_DISABLE"
#CONFIGS += -DL1_DISABLE
#CONFIGS += -set "SM_DISABLE"
#CONFIGS += -DSM_DISABLE
#CONFIGS += -set "EXT_F_DISABLE"
#CONFIGS += -DEXT_F_DISABLE
#CONFIGS += -set "NUM_WARPS=2" -set "NUM_THREADS=2"
#CONFIGS += -DNUM_WARPS=2 -DNUM_THREADS=2
FPU_INCLUDE = -I$(RTL_DIR)/fpu_unit -I$(THIRD_PARTY_DIR)/fpnew/src -I$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include -I$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src
TEX_INCLUDE = -I$(RTL_DIR)/tex_unit