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minor update

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This commit is contained in:
Blaise Tine 2024-08-12 14:01:11 -07:00
parent 9053919e92
commit 79362dea4b
2 changed files with 25 additions and 30 deletions
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25
hw/rtl/libs/VX_mem_coalescer.sv
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@ -84,8 +84,8 @@ module VX_mem_coalescer #(
// tag + mask + offest
localparam IBUF_DATA_WIDTH = TAG_ID_WIDTH + NUM_REQS + (NUM_REQS * DATA_RATIO_W);
localparam STATE_SETUP = 0;
localparam STATE_SEND = 1;
localparam STATE_WAIT = 0;
localparam STATE_SEND = 1;
logic state_r, state_n;
@ -179,11 +179,9 @@ module VX_mem_coalescer #(
end
end
wire [OUT_REQS * DATA_RATIO - 1:0] pending_mask;
for (genvar i = 0; i < OUT_REQS * DATA_RATIO; ++i) begin
assign pending_mask[i] = in_req_mask[i] && ~addr_matches_r[i] && ~processed_mask_r[i];
end
wire batch_completed = ~(| pending_mask);
wire is_last_batch = ~(| (in_req_mask & ~addr_matches_r & ~processed_mask_r));
wire out_req_fire = out_req_valid && out_req_ready;
always @(*) begin
state_n = state_r;
@ -201,9 +199,9 @@ module VX_mem_coalescer #(
in_req_ready_n = 0;
case (state_r)
STATE_SETUP: begin
STATE_WAIT: begin
// wait for pending outgoing request to submit
if (out_req_valid && out_req_ready) begin
if (out_req_fire) begin
out_req_valid_n = 0;
end
if (in_req_valid && ~out_req_valid_n && ~ibuf_full) begin
@ -220,15 +218,14 @@ module VX_mem_coalescer #(
out_req_data_n = req_data_merged;
out_req_tag_n = {in_req_tag[TAG_WIDTH-1 -: UUID_WIDTH], ibuf_waddr};
in_req_ready_n = batch_completed;
in_req_ready_n = is_last_batch;
if (batch_completed) begin
if (is_last_batch) begin
processed_mask_n = '0;
end else begin
processed_mask_n = processed_mask_r | current_pmask;
end
state_n = STATE_SETUP;
state_n = STATE_WAIT;
end
endcase
end
@ -347,8 +344,6 @@ module VX_mem_coalescer #(
end
end
wire out_req_fire = out_req_valid && out_req_ready;
always @(posedge clk) begin
if (out_req_fire) begin
if (out_req_rw) begin

30
hw/rtl/libs/VX_stream_unpack.sv
View file

@ -1,10 +1,10 @@
// Copyright © 2019-2023
//
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// http://www.apache.org/licenses/LICENSE-2.0
//
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@ -15,8 +15,8 @@
`TRACING_OFF
module VX_stream_unpack #(
parameter NUM_REQS = 1,
parameter DATA_WIDTH = 1,
parameter NUM_REQS = 1,
parameter DATA_WIDTH = 1,
parameter TAG_WIDTH = 1,
parameter OUT_BUF = 0
) (
@ -31,28 +31,28 @@ module VX_stream_unpack #(
output wire ready_in,
// output
output wire [NUM_REQS-1:0] valid_out,
output wire [NUM_REQS-1:0] valid_out,
output wire [NUM_REQS-1:0][DATA_WIDTH-1:0] data_out,
output wire [NUM_REQS-1:0][TAG_WIDTH-1:0] tag_out,
input wire [NUM_REQS-1:0] ready_out
);
if (NUM_REQS > 1) begin
reg [NUM_REQS-1:0] sent_mask;
reg [NUM_REQS-1:0] rem_mask;
wire [NUM_REQS-1:0] ready_out_r;
wire [NUM_REQS-1:0] sent_mask_n = sent_mask | ready_out_r;
wire sent_all = ~(| (mask_in & ~sent_mask_n));
wire [NUM_REQS-1:0] rem_mask_n = rem_mask & ~ready_out_r;
wire sent_all = ~(| (mask_in & rem_mask_n));
always @(posedge clk) begin
if (reset) begin
sent_mask <= '0;
rem_mask <= '1;
end else begin
if (valid_in) begin
if (sent_all) begin
sent_mask <= '0;
rem_mask <= '1;
end else begin
sent_mask <= sent_mask_n;
rem_mask <= rem_mask_n;
end
end
end
@ -68,7 +68,7 @@ module VX_stream_unpack #(
) out_buf (
.clk (clk),
.reset (reset),
.valid_in (valid_in && mask_in[i] && ~sent_mask[i]),
.valid_in (valid_in && mask_in[i] && rem_mask[i]),
.ready_in (ready_out_r[i]),
.data_in ({data_in[i], tag_in}),
.data_out ({data_out[i], tag_out[i]}),
@ -76,13 +76,13 @@ module VX_stream_unpack #(
.ready_out (ready_out[i])
);
end
end else begin
`UNUSED_VAR (clk)
`UNUSED_VAR (reset)
`UNUSED_VAR (mask_in)
assign valid_out = valid_in;
assign valid_out = valid_in;
assign data_out = data_in;
assign tag_out = tag_in;
assign ready_in = ready_out;