vortex

mirror of https://github.com/vortexgpgpu/vortex.git synced 2025-06-28 01:28:42 -04:00

Author	SHA1	Message	Date
tinebp	e80ee2c819	minor update Some checks failed CI / setup (push) Has been cancelled Details CI / build (32) (push) Has been cancelled Details CI / build (64) (push) Has been cancelled Details CI / tests (cache, 32) (push) Has been cancelled Details CI / tests (cache, 64) (push) Has been cancelled Details CI / tests (config1, 32) (push) Has been cancelled Details CI / tests (config1, 64) (push) Has been cancelled Details CI / tests (config2, 32) (push) Has been cancelled Details CI / tests (config2, 64) (push) Has been cancelled Details CI / tests (debug, 32) (push) Has been cancelled Details CI / tests (debug, 64) (push) Has been cancelled Details CI / tests (opencl, 32) (push) Has been cancelled Details CI / tests (opencl, 64) (push) Has been cancelled Details CI / tests (regression, 32) (push) Has been cancelled Details CI / tests (regression, 64) (push) Has been cancelled Details CI / tests (scope, 32) (push) Has been cancelled Details CI / tests (scope, 64) (push) Has been cancelled Details CI / tests (stress, 32) (push) Has been cancelled Details CI / tests (stress, 64) (push) Has been cancelled Details CI / tests (synthesis, 32) (push) Has been cancelled Details CI / tests (synthesis, 64) (push) Has been cancelled Details CI / tests (vector, 32) (push) Has been cancelled Details CI / tests (vector, 64) (push) Has been cancelled Details CI / tests (vm, 32) (push) Has been cancelled Details CI / tests (vm, 64) (push) Has been cancelled Details CI / complete (push) Has been cancelled Details	2025-01-22 04:56:49 -08:00
tinebp	6bbcd4ebaf	vector updates with clang formatting	2024-12-05 15:55:57 -08:00
tinebp	6b23d290c3	vector ISA updates	2024-12-05 14:43:51 -08:00
MichaelJSr	073e0ddd10	Adds the riscv vector extension into simx Added vector regression test to ci.yml	2024-11-27 23:22:22 -08:00
MichaelJSr	0d04423074	Readded the ecall and ebreak instruction traps so that the riscv-vector tests run properly	2024-10-14 10:12:33 -07:00
jaewon-lee-github	bbc02cc013	merged with master	2024-10-03 13:44:39 -04:00
Jaewon Lee	4a606061d2	Merge branch 'develop' into tensor-core	2024-09-30 16:48:47 -04:00
Blaise Tine	41e41c9688	adjust SimX's split/join to match RTL.	2024-08-28 18:46:30 -07:00
Hanran Wu	ea9560b33b	merge	2024-08-23 17:44:24 -04:00
Blaise Tine	3efced37c5	trace INSTANCE_ID refactoring	2024-07-09 13:33:17 -07:00
Jaewon Lee	3caeeeea13	satp_ is not set, then we skip VAT	2024-06-30 00:35:26 -04:00
Nayan Sivakumar Nair	5b0fc8cbd4	Fixes for PR	2024-06-25 03:18:50 -04:00
Jaewon Lee	02091f3d44	Merge Vortex 2.2	2024-06-22 23:55:01 -04:00
Nayan Sivakumar Nair	a378aed67c	Moved tc_num, tc_size param to makefile args	2024-06-21 22:23:24 -04:00
Jaewon Lee	cfcece940e	Merge Austin's code (Preliminary)	2024-06-19 01:36:26 -04:00
Varsha Singhania	99c6a1af5a	Tensor cores in Vortex	2024-06-17 04:28:51 -04:00
Blaise Tine	99eaaf6189	uuid_gen cleanup	2024-06-08 01:57:38 -07:00
Blaise Tine	f8ef570778	riscv tests refactoring	2024-05-28 10:46:31 -07:00
Blaise Tine	717b2e9ba1	enable barrier and spawn skip mode if N=1	2024-05-08 04:23:38 -07:00
Blaise Tine	e84f978502	minor update	2024-05-01 00:02:52 -07:00
Blaise Tine	a167c07e7d	adding wait cycles to wspawn	2024-04-28 04:27:47 -07:00
Blaise Tine	25d0c76d14	enabling explicit kernel address and arguments allocation	2024-04-12 06:58:42 -07:00
Blaise Tine	db35f5d768	simx decode bug fix.	2024-04-09 01:34:14 -07:00
Blaise Tine	6b81b26ffc	enabling Makefile configuration with build folder support	2024-03-30 02:28:39 -07:00
Blaise Tine	840ced22a9	simx refactoring - emulation vs simulation discrete separation	2024-03-12 00:23:42 -07:00

25 commits