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17 commits

Author SHA1 Message Date
tinebp
e80ee2c819 minor update
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2025-01-22 04:56:49 -08:00
tinebp
6bbcd4ebaf vector updates with clang formatting 2024-12-05 15:55:57 -08:00
tinebp
6b23d290c3 vector ISA updates 2024-12-05 14:43:51 -08:00
MichaelJSr
073e0ddd10 Adds the riscv vector extension into simx
Added vector regression test to ci.yml
2024-11-27 23:22:22 -08:00
Varsha Singhania
99c6a1af5a Tensor cores in Vortex 2024-06-17 04:28:51 -04:00
Blaise Tine
ff6f33acff simx refactoring: simobject::push(), instr_trace, FUtype, pending_instrs_ 2024-03-11 15:39:49 -07:00
Blaise Tine
041f573815 cleaned up vector code from simx 2024-02-21 18:27:52 -08:00
Blaise Tine
d47cccc157 Vortex 2.0 changes:
+ Microarchitecture optimizations
+ 64-bit support
+ Xilinx FPGA support
+ LLVM-16 support
+ Refactoring and quality control fixes
2023-10-19 20:51:22 -07:00
Blaise Tine
703d3faf27 minor bug fixes 2022-02-05 06:37:54 -05:00
Blaise Tine
5fbace9fa0 fixed several bugs and refactor memory access 2022-02-04 17:50:19 -05:00
Blaise Tine
cf2a0a5f39 code refactoring 2022-02-04 00:07:24 -05:00
Santosh Srivatsan
836c777680 XLEN parameterization for simx 2022-02-03 15:19:31 -05:00
Santosh Srivatsan
ad92c09f5b Changed all instances of DWord to XWord and DWordI to XWordI. Added XLEN parameterization to the simx Makefile 2022-01-22 13:47:44 -05:00
Santosh Srivatsan
4abfca4cb2 Replaced all instanced of DoubleWord to DWord and DoubleWordI to DWordI 2021-12-13 19:55:02 -05:00
Santosh Srivatsan
5edb9098ce Merge branch 'simx64' 2021-12-10 21:48:29 -05:00
Santosh Srivatsan
e7bc436b52 Renamed simX to simx 2021-12-10 16:57:29 -05:00
Blaise Tine
2a7a4df342 simx directory name fix 2021-11-30 07:17:58 -05:00
Renamed from sim/simX/instr.h (Browse further)