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33 lines
No EOL
377 B
Verilog
33 lines
No EOL
377 B
Verilog
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`include "VX_define.v"
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`ifndef VX_FWD_REQ
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`define VX_FWD_REQ
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interface VX_forward_reqeust_inter ();
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wire[4:0] src1;
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wire[4:0] src2;
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wire[`NW_M1:0] warp_num;
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// source-side view
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modport snk (
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input src1,
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input src2,
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input warp_num
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);
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// source-side view
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modport src (
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output src1,
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output src2,
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output warp_num
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);
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endinterface
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`endif |