Commit graph

Select branches

Hide pull requests

main

Mono Color

• f2bb3c66c7
  
  Include extra documentation for ISA main Blizzard Finnegan 2025-02-06 10:08:59 -05:00
• ec65e86ba0
  
  Merge branch 'main' of ssh://git.blizzard.systems:25/blizzardfinnegan/riscv32 Blizzard Finnegan 2025-02-06 10:00:10 -05:00
• 3debeda82b
  
  Begin implementation of memory interface and PC Blizzard Finnegan 2025-02-06 09:47:52 -05:00
• a7d3f61326
  
  Add additional comments, continue cleaning Blizzard Finnegan 2025-01-25 17:43:28 -05:00
• 7acf129077
  
  Merge register files into single file Blizzard Finnegan 2025-01-22 21:25:42 -05:00
• b4d99ecdb9
  
  Continue basica ALU functions Blizzard Finnegan 2025-01-20 11:45:46 -05:00
• 8918668abd
  
  INclude makefile Blizzard Finnegan 2024-12-08 19:28:36 -05:00
• cf5643fa15
  
  Start implementing execution units Blizzard Finnegan 2024-12-03 22:16:16 -05:00
• 48d2cf2842
  
  Add note for compressed decode Blizzard Finnegan 2024-12-03 13:46:34 -05:00
• 591b08eb25
  
  Start compressed decoder Blizzard Finnegan 2024-12-03 13:44:08 -05:00
• fcd108be5c
  
  Finish basic instruction decoder Blizzard Finnegan 2024-12-03 12:55:48 -05:00
• 5d2eb1b25d
  
  Continue instruction decoder Blizzard Finnegan 2024-12-03 11:49:34 -05:00
• cc5e97b0ee
  
  Start developing instruction decoder Blizzard Finnegan 2024-12-02 22:07:37 -05:00
• 918c0e3a1e
  
  Add reference docs Blizzard Finnegan 2024-11-04 22:04:45 -05:00
• 91242e78dd
  
  Move old info into new repo Blizzard Finnegan 2024-11-04 22:02:35 -05:00
• 2c3bb0f877
  
  Initial commit Blizzard Finnegan 2024-11-04 21:56:55 -05:00