Update CV32A65X-annotated privileged ISA specification to reflect the fact that with PMP granularity 8 and only supported PMP address matching modes being OFF and TOR, bit 0 of the pmpaddr0..pmpaddr7 registers can be safely made read-only zero. Update riscv-config specifications and its generated files accordingly.
Both the ISA and design documentations use some parameters generated from the RTL (ports, parameters).
As of now, they are committed to the repository and can be out of sync with the code.
This PR removes them from the repository and freshly generates them from the code when building HTML files.
This PR also removes prebuilt HTML files (design & ISA docs) and generates them when building the top-level Read the Docs documentation (make -C docs).
since last riscv-isa-manual update (CVA6 commit 105d3601b):
- minor documentation changes
- use of docs-resources submodule inside riscv-isa-manual
- requires asciidoctor-lists