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3 commits

Author SHA1 Message Date
Tianrui Wei
4c01614f83
Bump CVA6 for OpenPiton, fix mmu issues (#968)
This PR does the following
    1. Bump the filelist for OpenPiton for new directory layout
    2. Remove AXI Interface for OpenPiton in the top level
    3. Fix several issues in MMU discovered during address translation last year, the changes in core/mmu_sv39/mmu.sv are a joint effort between Jbalkind minho-pulp zarubaf niwis acostillado tianrui-wei
    4. disable bitmanip by default
    5. separate an ariane config package for openpiton synthesis. Some of  the previous changes makes ariane too big for openpiton, so we need to revert these changes
    6. Don't increase number of writeback ports (NR_WB_PORTS) when cvxif is  not enabled
2022-10-14 07:38:42 +02:00
Moritz Schneider
011edf49bd
Fix exception type on PMP check during PTW (#908)
Fixes #906

According to the spec:
> If accessing pte violates a PMA or PMP check, raise an access-fault
> exception corresponding to the original access type.

Found by @Phantom1003 and @ProjectDimlight

Signed-off-by: Moritz Schneider <moritz.schneider@inf.ethz.ch>
2022-07-08 10:21:57 +02:00
André Sintzoff
3ddf797e95
Re-organize CVA6 and APU (#725)
* Initial repository re-organization (#662)

Initial attempt to split core from APU.

Signed-off-by: MikeOpenHWGroup <mike@openhwgroup.org>
Co-authored-by: Jean-Roch Coulon <jean-roch.coulon@invia.fr>

Compile `corev_apu` (#667)

* Makefile verilates corev_apu
* Cleanup README
* Fix URL to repo
* Cleaned-up Makefile verilates corev_apu

Signed-off-by: Mike Thompson <mike@openhwgroup.org>

Add extended verification support (#685)

* Makefile, riscv_pkg.sv: Select C64A6 or CV32A6

according to variant variable

Signed-off-by: Jean-Roch Coulon <jean-roch.coulon@thalesgroup.com>

* add RVFI tracer and debug support

New files: rvfi_pkg.sv, rvfi_tracer.sv, ariane_rvfi.pkg.sv

- RVFI ports are added to ariane module
- rvfi_tracer.sv is a module added in ariane-testharness.sv
- RVFI_TRACE enables RVFI trace generation

Co-authored-by: Florian Zaruba <zarubaf@iis.ee.ethz.ch>
Signed-off-by: Jean-Roch Coulon <jean-roch.coulon@thalesgroup.com>

* Move example_tb from cva6 to core-v-verif project

Signed-off-by: Jean-Roch Coulon <jean-roch.coulon@thalesgroup.com>

* Makefile: remove useless rule for vsim

Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>

* Makefile: add timescale definition when vsim is used

Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>

* Makefile: add vcs support (fix #570)

Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>

* rvfi_tracer.sv: fix compilation error raised by vcs

Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>

* Makefile: use only 2 threads for verilator

when using 4 threads, tests from riscv-compliance and riscv-tests
test suite are randomly stucked with rv32ima configuration

Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>

* Flist.cva6: cleanup for synthesis workflow

Thales synthesis workflow does not manage comments at end of lines

Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>

* Support FPGA generation

- ariane_xilinx.sv: fix AXI bus expansion
- .gitignore, Makefile, run.tcl: fix paths

Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>

* riscv-dbg: update to 989389b0 (to support 32-bit CVA6 debug)

Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>

* Create cva6_config_pkg to setup 32- or 64-bit configuration

According to selected configuration, Makefile calls
cv32a6_imac_sv0_config_pkg.sv or cv64a6_imac_sv39_config_pkg.sv

Signed-off-by: Jean-Roch Coulon <jean-roch.coulon@thalesgroup.com>

* Flist, ariane_wrapper.sv: add wrapper to expand rvfi and axi structures

needed for dc_shell

Signed-off-by: Jean-Roch Coulon <jean-roch.coulon@thalesgroup.com>

* cv*a6_*_pkg.sv, riscv_pkg.sv: (Fix) Use the camel case for the localparams

Signed-off-by: Jean-Roch Coulon <jean-roch.coulon@thalesgroup.com>

* riscv_pkg.sv: clean-up the cva6_config_pkg import

Signed-off-by: Jean-Roch Coulon <jean-roch.coulon@thalesgroup.com>

* Makefile, ariane.sv: RVFI_TRACE define conditions RVFI port in ariane

Signed-off-by: Jean-Roch Coulon <jean-roch.coulon@thalesgroup.com>

Co-authored-by: Jean-Roch Coulon <jean-roch.coulon@thalesgroup.com>
Co-authored-by: Florian Zaruba <zarubaf@iis.ee.ethz.ch>

* Add lfsr.sv to manifest

Signed-off-by: Mike Thompson <mike@openhwgroup.org>

* Directory re-organzation

* fpga/xilinx/xlnx_axi_dwidth_converter_dm_*: move files (#726)

into the new file organisation

Signed-off-by: André Sintzoff <andre.sintzoff@thalesgroup.com>

* move mmu_sv32 and mmu_sv39, move bootrom, update path (#729)

Signed-off-by: sjthales <sebastien.jacq@thalesgroup.com>

Co-authored-by: Mike Thompson <mike@openhwgroup.org>
Co-authored-by: Jean-Roch Coulon <jean-roch.coulon@thalesgroup.com>
Co-authored-by: Florian Zaruba <zarubaf@iis.ee.ethz.ch>
Co-authored-by: sébastien jacq <57099003+sjthales@users.noreply.github.com>
2021-09-24 17:21:19 +02:00
Renamed from src/mmu_sv39/mmu.sv (Browse further)