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cva6/config/riscv-config/cv32a65x
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Zbigniew Chamski ed89c717f7
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[CV32A65X] Update PMPADDRn spec to make bit 0 ROCST 0. Update config files. (#2651) 
Update CV32A65X-annotated privileged ISA specification to reflect the fact that with PMP granularity 8 and only supported PMP address matching modes being OFF and TOR, bit 0 of the pmpaddr0..pmpaddr7 registers can be safely made read-only zero. Update riscv-config specifications and its generated files accordingly.
2024-12-09 13:22:38 +01:00
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generated [CV32A65X] Update PMPADDRn spec to make bit 0 ROCST 0. Update config files. (#2651) 2024-12-09 13:22:38 +01:00
spec [CV32A65X] Update PMPADDRn spec to make bit 0 ROCST 0. Update config files. (#2651) 2024-12-09 13:22:38 +01:00