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cva6/verif/sim
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dependabot[bot] 7b759a8b71
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Bump verif/sim/dv from f0c570d to 7e54b67 (#2763) 
Bumps [verif/sim/dv](https://github.com/google/riscv-dv) from `f0c570d` to `7e54b67`.
- [Commits](f0c570d112...7e54b678ab)

---
updated-dependencies:
- dependency-name: verif/sim/dv
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com>
Co-authored-by: JeanRochCoulon <jean-roch.coulon@thalesgroup.com>
2025-02-11 10:48:31 +01:00
..
dv@7e54b678ab Bump verif/sim/dv from f0c570d to 7e54b67 (#2763) 2025-02-11 10:48:31 +01:00
cov-exclude-mod.lst Exclude HPD cache module from code coverage (#2194) 2024-06-04 23:30:36 +02:00
cva6-simulator.yaml move files to a verif directory 2023-09-07 09:50:50 +02:00
cva6.hvp CSR verification : modify coverage based on new specification (#2261) 2024-06-14 14:01:23 +02:00
cva6.py Update rvfi_tracer and cva6.py (#2684) 2025-01-31 13:10:27 +01:00
cva6.yaml Add vcs-uvm-gate ISS target 2024-10-08 21:14:33 +02:00
cva6_base_testlist.yaml add UVM interrupt agent (#2309) 2024-07-05 11:54:34 +02:00
cva6_spike_log_to_trace_csv.py [Spike Yaml] Integrate Spike Yaml support. (#2304) 2024-07-11 08:37:37 +02:00
init_run_uvm_fsdb.do move files to a verif directory 2023-09-07 09:50:50 +02:00
init_run_uvm_vpd.do move files to a verif directory 2023-09-07 09:50:50 +02:00
init_uvm.do move files to a verif directory 2023-09-07 09:50:50 +02:00
Makefile Makefile : Add target to generate functional coverage using verdi tool (#2755) 2025-01-31 14:13:36 +01:00
setup-env.sh Prepare for LLVM (#2251) 2024-06-14 11:12:03 +02:00
verilator_log_to_trace_csv.py move files to a verif directory 2023-09-07 09:50:50 +02:00