Commit graph

9 commits

Author SHA1 Message Date
Pirmin Vogel
09aad340b1 Update documentation of interrupt framework 2019-07-24 14:22:00 +01:00
Pirmin Vogel
2c0aabb6bb Doc: use `csr_num`.FIELD_NAME syntax when discussing CSR fields 2019-06-28 18:55:26 +01:00
Pirmin Vogel
07214f626d Switch to RISC-V spec compliant trap handling
For exceptions, the Ibex always jumps to the trap vector base address
specified in `mtvec`. The exception cause is specified in `mcause` with
possibly additional information in `mtval`.

Interrupts are handled in vectored mode as before.
2019-06-28 18:55:26 +01:00
Pirmin Vogel
5c4e6cb4e3 Doc: Update and cleanup 2019-06-07 13:49:12 +01:00
Pirmin Vogel
4809737b43 Correct order of exceptions in documentation 2019-05-22 17:02:18 +01:00
Pirmin Vogel
a44e312e74 Update doc to add data_err_i and LSU exceptions 2019-05-21 15:22:21 +01:00
Pirmin Vogel
93b0b77f27 Make sure boot_addr_i is aligned to 256 bytes
The core ignores the lowest byte of the boot address and thus does not
support booting from addresses not aligned to 256 bytes. This commit
updates both the documentation accordingly and adds an assert to the
IF stage.
2019-05-10 11:11:19 +01:00
Philipp Wagner
1b82b1bb7c Adjust documentation for ibex
With the rename from zero-riscy to ibex, and subsequent cleanups, the
documentation needs an update too.
2019-04-26 15:09:00 +01:00
Stefan Wallentowitz
c6eeb34f57 Convert documentation to restructured text
Convert the documentation to restructured text. It looks slightly
different to the previous Word document, but can better be handled by
source control. It also automatically handles the versioning.

To build it:

    python -m venv venv
    source venv/bin/activate
    pip install -r requirements.txt
    make html
    make latexpdf
2018-11-13 16:21:47 +01:00