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# Textbook Errata
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This document contains errata for [RISC-V System-on-Chip Design](https://www.amazon.com/RISC-V-Microprocessor-System-Chip-Design/dp/0323994989) published by Elsevier.
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Please contribute by making a pull request to modify this document on GitHub. Sort the errata by page number. Keep the correction as succinct as possible.
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Sample Errata
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| Page | Location | Error | Correction | Contributor |
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| ---- | -------- | ----- | ----------- | ----------- |
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| 42 | Fig 1.42 | foobar | FooBar | Ben Bitdiddle, Claremont, CA |
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