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This is great. The FPGA is able to send ethernet frames consisting of the RVVI data to the host computer.

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wireshark is able to capture the frames and they match the expected data!
This commit is contained in:
Rose Thompson 2024-05-30 17:57:28 -05:00
parent 6a4c8667df
commit 1df3e5239a
1 changed files with 2 additions and 1 deletions
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3
src/rvvi/packetizer.sv
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@ -71,7 +71,8 @@ module packetizer import cvw::*; #(parameter cvw_t P,
case(CurrState)
STATE_RDY: if (TransReady & valid) NextState = STATE_TRANS;
else if(~TransReady & valid) NextState = STATE_WAIT;
STATE_WAIT: if(TransReady) NextState = STATE_TRANS;
else NextState = STATE_RDY;
STATE_WAIT: if(TransReady) NextState = STATE_TRANS;
else NextState = STATE_WAIT;
STATE_TRANS: if(BurstDone) NextState = STATE_RDY;
else NextState = STATE_TRANS;