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Fix lockstep and fcov running at the same time

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Jordan Carlin 2025-02-13 02:06:09 -08:00
parent d3a6a0e40f
commit 79ec595d97
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1 changed files with 5 additions and 3 deletions
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8
sim/questa/wally.do
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@ -119,11 +119,13 @@ if {[lcheck lst "--fcov"]} {
if {[lcheck lst "--lockstep"]} {
set IMPERAS_HOME $::env(IMPERAS_HOME)
set lockstep 1
set SVLib " -sv_lib ${IMPERAS_HOME}/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model "
set lockstepvlog "+incdir+${IMPERAS_HOME}/ImpPublic/include/host \
+incdir+${IMPERAS_HOME}/ImpProprietary/include/host \
${IMPERAS_HOME}/ImpPublic/source/host/rvvi/*.sv \
${IMPERAS_HOME}/ImpPublic/source/host/rvvi/rvviApiPkg.sv \
${IMPERAS_HOME}/ImpProprietary/source/host/idv/*.sv"
set SVLib " -sv_lib ${IMPERAS_HOME}/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model "
# only add standard rvviTrace interface if not using the custom one from cvw-arch-verif
if {!$FunctCoverage} {append lockstepvlog " ${IMPERAS_HOME}/ImpPublic/source/host/rvvi/rvviTrace.sv"}
}
# if --breker found set flag and remove from list
@ -181,7 +183,7 @@ if {$DEBUG > 0} {
# because vsim will run vopt
set INC_DIRS "+incdir+${CONFIG}/${CFG} +incdir+${CONFIG}/deriv/${CFG} +incdir+${CONFIG}/shared"
set SOURCES "${SRC}/cvw.sv ${TB}/${TESTBENCH}.sv ${TB}/common/*.sv ${SRC}/*/*.sv ${SRC}/*/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*.sv ${WALLY}/addins/verilog-ethernet/*/*/*/*.sv"
vlog -permissive -lint -work ${WKDIR} {*}${INC_DIRS} {*}${FCvlog} {*}${DefineArgs} {*}${lockstepvlog} {*}${brekervlog} {*}${SOURCES} -suppress 2282,2583,7053,7063,2596,13286,2605,2250
vlog -permissive -lint -work ${WKDIR} {*}${INC_DIRS} {*}${DefineArgs} {*}${lockstepvlog} {*}${FCvlog} {*}${brekervlog} {*}${SOURCES} -suppress 2282,2583,7053,7063,2596,13286,2605,2250
# start and run simulation
# remove +acc flag for faster sim during regressions if there is no need to access internal signals