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Merge pull request #1352 from davidharrishmc/dev

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Decompressed and mmu coverage fixes
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Jordan Carlin 2025-04-11 09:45:20 -07:00 • committed by GitHub
commit c0274022fd
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3 changed files with 39 additions and 4 deletions
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4
sim/questa/coverage-exclusions-rv64gc.do
View file

@ -274,9 +274,7 @@ set line [GetLineNum ${SRC}/mmu/mmu.sv "ExecuteAccessF \\| ReadAccessM"]
coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line -item e 1 -fecexprrow 1,3,4
set line [GetLineNum ${SRC}/mmu/mmu.sv "ReadAccessM & ~WriteAccessM"]
coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line -item e 1 -fecexprrow 2-4
set line [GetLineNum ${SRC}/mmu/mmu.sv "assign AmoAccessM"]
coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line -item e 1
set line [GetLineNum ${SRC}/mmu/mmu.sv "assign AmoMisalignedCausesAccessFaultM"]
set line [GetLineNum ${SRC}/mmu/mmu.sv "assign AtomicMisalignedCausesAccessFaultM"]
coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line -item e 1
set line [GetLineNum ${SRC}/mmu/mmu.sv "DataMisalignedM & WriteAccessM"]
coverage exclude -scope /dut/core/ifu/immu/immu -linerange $line-$line -item e 1 -fecexprrow 1,2,4

2
src/ifu/decompress.sv
View file

@ -168,7 +168,7 @@ module decompress import cvw::*; #(parameter cvw_t P) (
else
if (rs2 == 5'b00000) begin
if (rds1 == 5'b00000) LInstrD = {1'b1, 12'b1, 5'b00000, 3'b000, 5'b00000, 7'b1110011}; // c.ebreak
else if (rds1 != 5'b0) LInstrD = {1'b1, 12'b0, rds1, 3'b000, 5'b00001, 7'b1100111}; // c.jalr
else LInstrD = {1'b1, 12'b0, rds1, 3'b000, 5'b00001, 7'b1100111}; // c.jalr
end else
if (rds1 != 0) LInstrD = {1'b1, 7'b0000000, rs2, rds1, 3'b000, rds1, 7'b0110011}; // c.add
else LInstrD = {1'b1, 25'b0, 7'b0010011}; // c.add with rd = 0 is a HINT, treated as nop, even if it is a C.NTL

37
tests/coverage/pmpadrdecs.S
View file

@ -19,4 +19,41 @@ main:
li t0, 0x1000000000
csrw pmpcfg0, t0
# test hitting each region in NA4 mode for DMMU
li t0, 0x20000000 # address 0x80000000
csrw pmpaddr15, t0
csrw pmpaddr14, t0
csrw pmpaddr13, t0
csrw pmpaddr12, t0
li t0, 0x1717171717171717 # every region is NA4 XWR
csrw pmpcfg0, t0
csrw pmpcfg2, t0
li t0, 0x80000000
lw t1, 0(t0)
# test hitting region in NA4 mode for IMMU
la t0, pmpjump # address of a jump destination to exercise immu pmpchecker
srli t1, t0, 2 # shift right by 2 to convert to PMP format
csrw pmpaddr15, t1
csrw pmpaddr14, t1
csrw pmpaddr13, t1
csrw pmpaddr12, t1
csrw pmpaddr11, t1
csrw pmpaddr10, t1
csrw pmpaddr9, t1
csrw pmpaddr8, t1
csrw pmpaddr7, t1
csrw pmpaddr6, t1
csrw pmpaddr5, t1
csrw pmpaddr4, t1
csrw pmpaddr3, t1
csrw pmpaddr2, t1
csrw pmpaddr1, t1
csrw pmpaddr0, t1
jalr t0
j done
pmpjump:
ret