cvw/config/rv32gc/imperas.ic
2025-03-19 23:56:35 -07:00

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# imperas.ic
# Initialization file for rv32gc ImperasDV lock step simulation
# David_Harris@hmc.edu 15 August 2024
# jcarlin@hmc.edu 19 March 2025
# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
# Base configuration
--variant RV32GCK # for RV32GC
# Bit manipulation
--override cpu/add_Extensions=B
--override cpu/misa_B_Zba_Zbb_Zbs=T
# Cache block operations
--override cpu/Zicbom=T
--override cpu/Zicbop=T
--override cpu/Zicboz=T
--override cmomp_bytes=64 # Zic64b
--override cmoz_bytes=64 # Zic64b
--override lr_sc_grain=4 # Za64rs requires <=64; we use native word size
# Virtual memory
--override cpu/Sv_modes=3 # SV32 supported
--override cpu/Svadu=T # Enable SVADU hardware update of A/D bits when menvcfg.ADUE=1
--override cpu/Svinval=T
# Crypto extensions
--override cpu/Zkr=F # Zkr entropy source and seed register not supported.
--override cpu/Zksed=F # ShangMi Crypto not supported
--override cpu/Zksh=F # ShangMi Crypto not supported
--override cpu/mnoise_undefined=T # nonratified mnoise register not implemented
# Miscellaneous extensions
--override cpu/Zicond=T
--override cpu/Zfh=T
--override cpu/Zfa=T
--override cpu/Zcb=T
--override cpu/Sstc=T
# mcause and scause only have 4 lsbs of code and 1 msb of interrupt flag
--override cpu/ecode_mask=0x8000000F # for RV32
# Misaligned access (Zicclsm) is not supported
--override cpu/unaligned=F
# PMP Configuration
--override cpu/PMP_registers=16
--override cpu/PMP_undefined=T
# PMA Settings
# 'r': read access allowed
# 'w': write access allowed
# 'x': execute access allowed
# 'a': aligned access required
# 'A': atomic instructions NOT allowed (actually USER1 privilege needed)
# 'P': push/pop instructions NOT allowed (actually USER2 privilege needed)
# '1': 1-byte accesses allowed
# '2': 2-byte accesses allowed
# '4': 4-byte accesses allowed
# '8': 8-byte accesses allowed
# '-', space: ignored (use for input string formatting).
#
# SVxx Memory 0x0000000000 0x7FFFFFFFFF
#
--callcommand refRoot/cpu/setPMA -lo 0x0000000000 -hi 0xFFFFFFFFFFFFFFFFFF -attributes " ---a-- ---- " # All memory inaccessible unless defined otherwise
--callcommand refRoot/cpu/setPMA -lo 0x0000000000 -hi 0x7FFFFFFFFF -attributes " ---a-- ---- " # INITIAL
--callcommand refRoot/cpu/setPMA -lo 0x0000001000 -hi 0x0000001FFF -attributes " r-x-A- 1248 " # BOOTROM
--callcommand refRoot/cpu/setPMA -lo 0x0000012100 -hi 0x000001211F -attributes " rw-aA- --48 " # SDC
--callcommand refRoot/cpu/setPMA -lo 0x0002000000 -hi 0x000200FFFF -attributes " rw-aA- 1248 " # CLINT
--callcommand refRoot/cpu/setPMA -lo 0x000C000000 -hi 0x000FFFFFFF -attributes " rw-aA- --4- " # PLIC
--callcommand refRoot/cpu/setPMA -lo 0x0010000000 -hi 0x0010000007 -attributes " rw-aA- 1--- " # UART0
--callcommand refRoot/cpu/setPMA -lo 0x0010060000 -hi 0x00100600FF -attributes " rw-aA- --4- " # GPIO
--callcommand refRoot/cpu/setPMA -lo 0x0010040000 -hi 0x0010040FFF -attributes " rw-aA- --4- " # SPI
--callcommand refRoot/cpu/setPMA -lo 0x0080000000 -hi 0x008FFFFFFF -attributes " rwx--- 1248 " # UNCORE_RAM