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added patch for xlen for riscv-arch-tests

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Saad Khalid 2023-02-06 17:10:22 +00:00 • committed by Greg Chadwick
parent 539316365f
commit 4c2a406590
2 changed files with 14 additions and 0 deletions
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12
vendor/patches/riscv_arch_tests/xlen_change.patch vendored Normal file
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@ -0,0 +1,12 @@
diff --git a/riscv-test-suite/env/arch_test.h b/riscv-test-suite/env/arch_test.h
index e542123b9..d731973fd 100644
--- a/riscv-test-suite/env/arch_test.h
+++ b/riscv-test-suite/env/arch_test.h
@@ -86,6 +86,7 @@
#include "encoding.h"
#include "test_macros.h"
+#define XLEN __riscv_xlen
#define MIN(a,b) (((a)<(b))?(a):(b))
#define MAX(a,b) (((a)>(b))?(a):(b))
#define BIT(addr, bit) (((addr)>>(bit))&1)

2
vendor/riscv-arch-tests/riscv-test-suite/env/arch_test.h vendored
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@ -104,6 +104,8 @@
#define LIMMSZ (WDBITS-IMMSZ)
#define LIMMMSK ( (1 <<LIMMSZ)-1)
#define XLEN __riscv_xlen
#define ALIGNSZ ((XLEN>>5)+2) // log2(XLEN): 2,3,4 for XLEN 32,64,128
#if XLEN>FLEN
#define SIGALIGN REGWIDTH